XC2V4000 Datasheet, PDF (67/311 Pages) Xilinx, Inc – Summary of Features

R
Virtex™-II Platform FPGAs: DC and Switching Characteristics
Clock Distribution Switching Characteristics
Table 19: Clock Distribution Switching Characteristics
Description
Global Clock Buffer I input to O output
Symbol
T_GIO
Speed Grade
–6
–5
–4
0.47
0.52
0.59
Units
ns, Max
CLB Switching Characteristics
Delays originating at F/G inputs vary slightly according to the input used (see Figure 16 in Module 2). The values listed below
are worst-case. Precise values are provided by the timing analyzer.
Table 20: CLB Switching Characteristics
Speed Grade
Description
Symbol
–6
–5
–4
Units
Combinatorial Delays
4-input function: F/G inputs to X/Y outputs
T_ILO
0.35
0.39
5-input function: F/G inputs to F5 output
T_IF5
0.57
0.63
5-input function: F/G inputs to X output
T_IF5X
0.76
0.83
FXINA or FXINB inputs to Y output via MUXFX
T_IFXY
0.36
0.39
FXINA input to FX output via MUXFX
T_INAFX
0.26
0.28
FXINB input to FX output via MUXFX
T_INBFX
0.26
0.28
SOPIN input to SOPOUT output via ORCY
T_SOPSOP
0.35
0.38
Incremental delay routing through transparent latch
to XQ/YQ outputs
T_IFNCTL
0.41
0.45
0.44
ns, Max
0.72
ns, Max
0.95
ns, Max
0.45
ns, Max
0.32
ns, Max
0.32
ns, Max
0.44
ns, Max
0.51
ns, Max
Sequential Delays
FF Clock CLK to XQ/YQ outputs
Latch Clock CLK to XQ/YQ outputs
Setup and Hold Times Before/After Clock CLK
T_CKO
T_CKLO
0.45
0.50
0.54
0.59
0.57
ns, Max
0.68
ns, Max
BX/BY inputs
DY inputs
DX inputs
CE input
SR/BY inputs (synchronous)
Clock CLK
T_DICK/T_CKDI
T_DYCK/T_CKDY
T_DXCK/T_CKDX
T_CECK/T_CKCE
T_SRCK/T_SCKR
0.30/–0.07
0.30/–0.07
0.30/–0.07
0.19/–0.06
0.21/–0.02
0.33/–0.08
0.33/–0.08
0.33/–0.08
0.21/–0.07
0.23/–0.03
0.37/–0.09
0.37/–0.09
0.37/–0.09
0.24/–0.08
0.26/–0.03
ns, Min
ns, Min
ns, Min
ns, Min
ns, Min
Minimum Pulse Width, High
Minimum Pulse Width, Low
Set/Reset
T_CH
0.61
0.67
0.77
ns, Min
T_CL
0.61
0.67
0.77
ns, Min
Minimum Pulse Width, SR/BY inputs
Delay from SR/BY inputs to XQ/YQ outputs
(asynchronous)
T_RPW
T_RQ
0.61
0.67
1.06
1.17
0.77
ns, Min
1.34
ns, Max
Toggle Frequency (MHz) (for export control)
F_TOG
820
750
650
MHz
DS031-3 (v3.0) August 1, 2003
Product Specification
www.xilinx.com
1-800-255-7778
Module 3 of 4
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