XC2V4000 Datasheet, PDF (34/311 Pages) Xilinx, Inc – Summary of Features

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Virtex™-II Platform FPGAs: Detailed Description
Total Amount of SelectRAM Memory
Table 18 shows the amount of block SelectRAM memory
available for each Virtex-II device. The 18 Kbit SelectRAM
blocks are cascadable to implement deeper or wider single- or
dual-port memory resources.
Table 18: Virtex-II SelectRAM Memory Available
Total SelectRAM Memory
Device
Blocks
in Kbits
in Bits
XC2V40
4
72
73,728
XC2V80
8
144
147,456
XC2V250
24
432
442,368
XC2V500
32
576
589,824
XC2V1000
40
720
737,280
XC2V1500
48
864
884,736
XC2V2000
56
1,008
1,032,192
XC2V3000
96
1,728
1,769,472
XC2V4000
120
2,160
2,211,840
XC2V6000
144
2,592
2,654,208
XC2V8000
168
3,024
3,096,576
18-Bit x 18-Bit Multipliers
Introduction
A Virtex-II multiplier block is an 18-bit by 18-bit 2’s comple-
ment signed multiplier. Virtex-II devices incorporate many
embedded multiplier blocks. These multipliers can be asso-
ciated with an 18 Kbit block SelectRAM resource or can be
used independently. They are optimized for high-speed
operations and have a lower power consumption compared
to an 18-bit x 18-bit multiplier in slices.
Each SelectRAM memory and multiplier block is tied to four
switch matrices, as shown in Figure 35.
Switch
Matrix
Switch
Matrix
Switch
Matrix
18-Kbit block
SelectRAM
Switch
Matrix
DS031_33_101000
Figure 35: SelectRAM and Multiplier Blocks
Association With Block SelectRAM Memory
The interconnect is designed to allow SelectRAM memory
and multiplier blocks to be used at the same time, but some
interconnect is shared between the SelectRAM and the
multiplier. Thus, SelectRAM memory can be used only up to
18 bits wide when the multiplier is used, because the multi-
plier shares inputs with the upper data bits of the
SelectRAM memory.
This sharing of the interconnect is optimized for an
18-bit-wide block SelectRAM resource feeding the multi-
plier. The use of SelectRAM memory and the multiplier with
an accumulator in LUTs allows for implementation of a digi-
tal signal processor (DSP) multiplier-accumulator (MAC)
function, which is commonly used in finite and infinite
impulse response (FIR and IIR) digital filters.
Configuration
The multiplier block is an 18-bit by 18-bit signed multiplier
(2's complement). Both A and B are 18-bit-wide inputs, and
the output is 36 bits. Figure 36 shows a multiplier block.
A[17:0]
Multiplier Block
B[17:0]
MULT 18 x 18
P[35:0]
DS031_40_100400
Figure 36: Multiplier Block
DS031-2 (v3.0) August 1, 2003
Product Specification
www.xilinx.com
1-800-255-7778
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