XC2V4000 Datasheet, PDF (227/311 Pages) Xilinx, Inc – Summary of Features

R
Virtex™-II Platform FPGAs: Pinout Information
Table 12: FF1152 BGA — XC2V3000, XC2V4000, XC2V6000, and XC2V8000
Bank
Pin Description
Pin Number
7
IO_L76P_7
N33
7
IO_L76N_7
P33
7
IO_L75P_7/VREF_7
R29
7
IO_L75N_7
R28
7
IO_L74P_7
R26
7
IO_L74N_7
P26
7
IO_L73P_7
N31
7
IO_L73N_7
P31
7
IO_L72P_7
N30
7
IO_L72N_7
P30
7
IO_L71P_7
R25
7
IO_L71N_7
P25
7
IO_L70P_7
L34
7
IO_L70N_7
M34
7
IO_L69P_7/VREF_7
P29
7
IO_L69N_7
N29
7
IO_L68P_7
P27
7
IO_L68N_7
N27
7
IO_L67P_7
L32
7
IO_L67N_7
M32
7
IO_L54P_7
L31
7
IO_L54N_7
M31
7
IO_L53P_7
K29
7
IO_L53N_7
L30
7
IO_L52P_7
L33
7
IO_L52N_7
M33
7
IO_L51P_7/VREF_7
M29
7
IO_L51N_7
L29
7
IO_L50P_7
M28
7
IO_L50N_7
N28
7
IO_L49P_7
K30
7
IO_L49N_7
K31
7
IO_L48P_7
H32
7
IO_L48N_7
J32
7
IO_L47P_7
N26
7
IO_L47N_7
M26
No Connect in the XC2V3000
DS031-4 (v2.0) August 1, 2003
Product Specification
www.xilinx.com
1-800-255-7778
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