XC2V4000 Datasheet, PDF (226/311 Pages) Xilinx, Inc – Summary of Features

R
Virtex™-II Platform FPGAs: Pinout Information
Table 12: FF1152 BGA — XC2V3000, XC2V4000, XC2V6000, and XC2V8000
Bank
Pin Description
Pin Number
6
IO_L93N_6/VREF_6
W31
6
IO_L94P_6
V26
6
IO_L94N_6
V27
6
IO_L95P_6
W30
6
IO_L95N_6
V30
6
IO_L96P_6
V32
6
IO_L96N_6
W32
No Connect in the XC2V3000
7
IO_L96P_7
U31
7
IO_L96N_7
V31
7
IO_L95P_7
T28
7
IO_L95N_7
U28
7
IO_L94P_7
U33
7
IO_L94N_7
U34
7
IO_L93P_7/VREF_7
U29
7
IO_L93N_7
T29
7
IO_L92P_7
U27
7
IO_L92N_7
U26
7
IO_L91P_7
T30
7
IO_L91N_7
U30
7
IO_L84P_7
R32
NC
7
IO_L84N_7
T32
NC
7
IO_L83P_7
U25
NC
7
IO_L83N_7
T25
NC
7
IO_L82P_7
R34
NC
7
IO_L82N_7
T33
NC
7
IO_L81P_7/VREF_7
N34
NC
7
IO_L81N_7
P34
NC
7
IO_L80P_7
U24
NC
7
IO_L80N_7
T24
NC
7
IO_L79P_7
R31
NC
7
IO_L79N_7
T31
NC
7
IO_L78P_7
N32
7
IO_L78N_7
P32
7
IO_L77P_7
T27
7
IO_L77N_7
R27
DS031-4 (v2.0) August 1, 2003
Product Specification
www.xilinx.com
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