XC3000FM Datasheet, PDF (41/50 Pages) Xilinx, Inc – XC3000 Logic Cell Array Families

XC3000 Families 100-Pin QFP Pinouts
XC3000, XC3000A, XC3000L, XC3100 and XC3100A families have identical pinouts
Pin No.
CQFP
PQFP
TQFP
VQFP
1
16
13
2
17
14
3
18
15
4
19
16
5
20
17
6
21
18
7
22
19
8
23
20
9
24
21
10
25
22
11
26
23
12
27
24
13
28
25
14
29
26
15
30
27
16
31
28
17
32
29
18
33
30
19
34
31
20
35
32
21
36
33
22
37
34
23
38
35
24
39
36
25
40
37
26
41
38
27
42
39
28
43
40
29
44
41
30
45
42
31
46
43
32
47
44
33
48
45
34
49
46
XC3020
XC3030
XC3042
GND
A13-I/O
A6-I/O
A12-I/O
A7-I/O
I/O*
I/O*
A11-I/O
A8-I/O
A10-I/O
A9-I/O
VCC*
GND*
PWRDN
TCLKIN-I/O
I/O**
I/O*
I/O*
I/O
I/O
I/O
I/O
I/O
I/O
I/O
VCC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Pin No.
CQFP
PQFP
TQFP
VQFP
35
50
47
36
51
48
37
52
49
38
53
50
39
54
51
40
55
52
41
56
53
42
57
54
43
58
55
44
59
56
45
60
57
46
61
58
47
62
59
48
63
60
49
64
61
50
65
62
51
66
63
52
67
64
53
68
65
54
69
66
55
70
67
56
71
68
57
72
69
58
73
70
59
74
71
60
75
72
61
76
73
62
77
74
63
78
75
64
79
76
65
80
77
66
81
78
67
82
79
68
83
80
XC3020
XC3030
XC3042
I/O*
I/O*
M1-RD
GND*
MO-RT
VCC*
M2-I/O
HDC-I/O
I/O
LDC-I/O
I/O*
I/O*
I/O
I/O
I/O
INIT-I/O
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O*
I/O*
XTL2-I/O
GND*
RESET
VCC*
DONE-PG
D7-I/O
BCLKIN-XTL1-I/O
D6-I/O
Pin No.
CQFP
PQFP
TQFP
VQFP
XC3020
XC3030
XC3042
69
84
81
I/O*
70
85
82
I/O*
71
86
83
I/O
72
87
84
D5-I/O
73
88
85
CS0-I/O
74
89
86
D4-I/O
75
90
87
I/O
76
91
88
VCC
77
92
89
D3-I/O
78
93
90
CS1-I/O
79
94
91
D2-I/O
80
95
92
I/O
81
96
93
I/O*
82
97
94
I/O*
83
98
95
D1-I/O
84
99
96 RDY/BUSY-RCLK-I/O
85 100 97
DO-DIN-I/O
86
1
98
DOUT-I/O
87
2
99
CCLK
88
3
100
VCC*
89
4
1
GND*
90
5
2
AO-WS-I/O
91
6
3
A1-CS2-I/O
92
7
4
I/O**
93
8
5
A2-I/O
94
9
6
A3-I/O
95
10
7
I/O*
96
11
8
I/O*
97
12
9
A15-I/O
98
13
10
A4-I/O
99
14
11
A14-I/O
100 15
12
A5-I/O
Unprogrammed IOBs have a default pull-up. This prevents an undefined pad level for unbonded or unused IOBs.
Programmed outputs are default slew-rate limited.
* This table describes the pinouts of three different chips in three different packges. The pin-description column lists 100 of the 118
pads on the XC3042 that are connected to the 100 package pins. Two pads, indicated by double asterisks, do not exist on the
XC3030, which has 98 pads; therefore the corresponding pins have no connections. Twenty-six pads, indicated by single or double
asterisks, do not exist on the XC3020, which has 74 pads; therefore, the corresponding pins have no connections. (See table on
page 2-139.)
2-143