XC3000FM Datasheet, PDF (37/50 Pages) Xilinx, Inc – XC3000 Logic Cell Array Families

XC3000 Families Pin Assignments
Xilinx offers the six different array sizes in the XC3000
families in a variety of surface-mount and through-hole
package types, with pin counts from 44 to 223.
Each chip is offered in several package types to accommo-
date the available PC board space and manufacturing
technology. Most package types are also offered with
different chips to accommodate design changes without
the need for PC board changes.
Note that there is no perfect match between the number of
bonding pads on the chip and the number of pins on a
package. In some cases, the chip has more pads than
there are pins on the package, as indicated by the informa-
tion (“unused” pads) below the line in the following table.
The IOBs of the unconnected pads can still be used as
storage elements if the specified propagation delays and
set-up times are acceptable.
In other cases, the chip has fewer pads than there are
pins on the package; therefore, some package pins are
not connected (n.c.), as shown above the line in the
following table.
Number of Unbounded or Unconnected Pins
Device Pads 44
64
3020 74
—
—
3030 98
54 u 34 u
3042 118
—
—
3064 142
—
—
3090 166
—
—
3195 198
—
—
n.c. = Unconnected package pin
u = Unbonded device pad
Number of Package Pins
68
84 100 132 144 160 175 176 208 223
6 u 10 n.c. 26 n.c. —
—
—
—
—
—
—
30 u 14 u 2 n.c. —
—
—
—
—
—
—
— 34 u 18 u 14 n.c. 26 n.c. —
—
—
—
—
— 50 u — 10 u 2 u 18 n.c. —
—
—
—
— 82 u —
—
—
6 u 9 n.c 10 n.c. 42 n.c. —
— 114 u —
—
—
—
9 n.c.
32 u
— 10 n.c. 25 n.c.
X6095
Number of Available I/O Pins
XC3020/XC3120
XC3030/XC3130
XC3042/XC3142
XC3064/XC3164
XC3090/XC3190
XC3195
Number of Package Pins
Max I/O ^{44 64 68 84 100 120 132 144 156 160 164 175 176 191 196 208 223 240}
64
58 64 64
80 34 54 58 74 80
96
74 82
96
120
70
110
144
70
176
70
120
138 142 144 144
138
144
144
176 176
X3478
2-139