DS705 Datasheet, PDF (20/54 Pages) Xilinx, Inc – Integrated adder for complex multiply or multiply-add operation

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XA Spartan-3A DSP Automotive FPGA Family Data Sheet
Input Propagation Times
Table 22: Propagation Times for the IOB Input Path
Symbol
Description
Conditions
Propagation Times
T_IOPLI
The time it takes for data to travel from the Input
pin through the IFF latch to the I output with no
input delay programmed
T_IOPLID The time it takes for data to travel from the Input
pin through the IFF latch to the I output with the
input delay programmed
LVCMOS25⁽²⁾
LVCMOS25⁽²⁾
IFD_DELAY
_VALUE
Device
Speed Grade
-4
Max
0
XA3SD1800A
2.04
XA3SD3400A
2.11
1
XA3SD1800A
2.47
2
3.06
3
3.86
4
4.43
5
4.39
6
5.32
7
6.24
8
6.86
1
XA3SD3400A
2.67
2
3.25
3
4.04
4
4.62
5
4.49
6
5.31
7
6.18
8
6.78
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes:
1. The numbers in this table are tested using the methodology presented in Table 27 and are based on the operating conditions set forth in
Table 8 and Table 11.
2. This propagation time requires adjustment whenever a signal standard other than LVCMOS25 is assigned to the data Input. When this is
true, add the appropriate Input adjustment from Table 23.
DS705 (v1.1) January 20, 2009
www.xilinx.com
Product Specification
20