DS705 Datasheet, PDF (16/54 Pages) Xilinx, Inc – Integrated adder for complex multiply or multiply-add operation

R
XA Spartan-3A DSP Automotive FPGA Family Data Sheet
Switching Characteristics
All XA Spartan-3A DSP FPGAs ship in the -4 speed grade.
Switching characteristics in this document are designated
as Production, as shown in Table 16.
Production: These specifications are approved once
enough production silicon of a particular device family
member has been characterized to provide full correlation
between speed files and devices over numerous production
lots. There is no under-reporting of delays, and customers
receive formal notification of any subsequent changes.
Software Version Requirements
Production-quality systems must use FPGA designs
compiled using a speed file designated as PRODUCTION
status. FPGAs designs using a less mature speed file
designation should only be used during system prototyping
or pre-production qualification. FPGA designs with speed
files designated as Preview, Advance, or Preliminary should
not be used in a production-quality system.
Whenever a speed file designation changes, as a device
matures toward Production status, rerun the latest Xilinx
ISE software on the FPGA design to ensure that the FPGA
design incorporates the latest timing information and
software updates.
All parameter limits are representative of worst-case supply
voltage and junction temperature conditions. Unless
otherwise noted, the published parameter values apply
to all XA Spartan-3A DSP devices. AC and DC
characteristics are specified using the same numbers
for both I-Grade and Q-Grade.
To create a Xilinx MySupport user account and sign up for
automatic E-mail notification whenever this data sheet is
updated:
• Sign Up for Alerts on Xilinx MySupport
Timing parameters and their representative values are
selected for inclusion below either because they are
important as general design requirements or they indicate
fundamental device performance characteristics. The XA
Spartan-3A DSP FPGA speed files (v1.32), part of the
Xilinx Development Software, are the original source for
many but not all of the values. The speed grade
designations for these files are shown in Table 16. For more
complete, more precise, and worst-case data, use the
values reported by the Xilinx static timing analyzer (TRACE
in the Xilinx development software) and back-annotated to
the simulation netlist.
Table 16: XA Spartan-3A DSP FPGA v1.32 Speed
Grade Designations
Device
Production
XA3SD1800A
-4
XA3SD3400A
-4
Table 17 provides the recent history of the XA
Spartan-3A DSP FPGA speed files.
Table 17: XA Spartan-3A DSP Speed File Version
History
Version
ISE Software
Release
Description
1.32
ISE 10.1 SP2 Support for Automotive.
DS705 (v1.1) January 20, 2009
www.xilinx.com
Product Specification
16