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SM320C6727B-EP Datasheet, PDF (95/109 Pages) Texas Instruments – Floating-Point Digital Signal Processor
SM320C6727B-EP
www.ti.com
SPRS793A – SEPTEMBER 2011 – REVISED OCTOBER 2011
4.15.3 I2C Electrical Data/Timing
4.15.3.1 Inter-Integrated Circuit (I2C) Timing
Table 4-34 and Table 4-35 are not production tested and are specified by design to 105°C
(see Figure 4-40 and Figure 4-41).
NO.
1
tc(SCL)
2
tsu(SCLH-SDAL)
3
th(SCLL-SDAL)
4
tw(SCLL)
5
tw(SCLH)
6
tsu(SDA-SCLH)
7
th(SDA-SCLL)
8
tw(SDAH)
9
tr(SDA)
10
tr(SCL)
11
tf(SDA)
12
tf(SCL)
13
tsu(SCLH-SDAH)
14 tw(SP)
15 Cb
Table 4-34. I2C Input Timing Requirements
Cycle time, I2Cx_SCL
Setup time, I2Cx_SCL high before I2Cx_SDA
low
Hold time, I2Cx_SCL low after I2Cx_SDA low
Pulse duration, I2Cx_SCL low
Pulse duration, I2Cx_SCL high
Setup time, I2Cx_SDA before I2Cx_SCL high
Hold time, I2Cx_SDA after I2Cx_SCL low
Pulse duration, I2Cx_SDA high
Rise time, I2Cx_SDA
Rise time, I2Cx_SCL
Fall time, I2Cx_SDA
Fall time, I2Cx_SCL
Setup time, I2Cx_SCL high before I2Cx_SDA
high
Pulse duration, spike (must be suppressed)
Capacitive load for each bus line
Standard Mode
Fast Mode
Standard Mode
Fast Mode
Standard Mode
Fast Mode
Standard Mode
Fast Mode
Standard Mode
Fast Mode
Standard Mode
Fast Mode
Standard Mode
Fast Mode
Standard Mode
Fast Mode
Standard Mode
Fast Mode
Standard Mode
Fast Mode
Standard Mode
Fast Mode
Standard Mode
Fast Mode
Standard Mode
Fast Mode
Standard Mode
Fast Mode
Standard Mode
Fast Mode
MIN
10
2.5
4.7
0.6
4
0.6
4.7
1.3
4
0.6
250
100
0
0
4.7
1.3
20 + 0.1Cb
20 + 0.1Cb
20 + 0.1Cb
20 + 0.1Cb
4
0.6
N/A
0
MAX UNIT
μs
μs
μs
μs
μs
ns
μs
0.9
μs
1000
ns
300
1000
ns
300
300
ns
300
300
ns
300
μs
ns
50
400
pF
400
Table 4-35. I2C Switching Characteristics(1)
NO.
16
tc(SCL)
17
tsu(SCLH-SDAL)
18
th(SDAL-SCLL)
19
tw(SCLL)
PARAMETER
Cycle time, I2Cx_SCL
Setup time, I2Cx_SCL high before I2Cx_SDA
low
Hold time, I2Cx_SCL low after I2Cx_SDA low
Pulse duration, I2Cx_SCL low
Standard Mode
Fast Mode
Standard Mode
Fast Mode
Standard Mode
Fast Mode
Standard Mode
Fast Mode
MIN
MAX UNIT
10
μs
2.5
4.7
μs
0.6
4
μs
0.6
4.7
μs
1.3
(1) I2C must be configured correctly to meet the timings in Table 4-35.
Copyright © 2011, Texas Instruments Incorporated
Peripheral and Electrical Specifications
95
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