SM320C6727B-EP Datasheet, PDF (57/109 Pages) Texas Instruments – Floating-Point Digital Signal Processor

SM320C6727B-EP
www.ti.com
SPRS793A – SEPTEMBER 2011 – REVISED OCTOBER 2011
Figure 4-18 illustrates the Multiplexed Host Address/Data Fullword Mode hookup between the C672x DSP
and an external host microcontroller. In this mode, all 32 bits of UHPI_HD[31:0] are used and the host can
access HPIA, HPID, and HPIC in a single bus cycle.
DSP
External Host MCU
EM_D[31:16]/UHPI_HA[15:0]^(A)
NC
UHPI_HCNTL[1:0]
UHPI_HD[15:0]
UHPI_HD[16]/HHWIL
UHPI_HD[31:17]
UHPI_HAS^(B)
UHPI_HBE[3:0]
UHPI_HRW
UHPI_HDS[2]
UHPI_HDS[1]
UHPI_HCS
UHPI_HRDY
AMUTE2/HINT
A[x:y]^(C)
D[15:0]
D[16]
D[31:17]
BE[3:0]^(D)
R/W
WE^(E)
RD^(E)
CS
RDY
INTERRUPT
A. May be used as EM_D[31:16]
B. Optional for hosts supporting multiplexed address and data. Pull up if not used. Low when address is on the bus.
C. Two host address lines or host GPIO if address lines are not available.
D. Byte Enables (active during reads and writes). Some processors support a byte-enable mode on their write enable
pins.
E. Only required if needed for strobe timing. Not required if CS meets strobe timing requirements.
Figure 4-18. UHPI Multiplexed Host Address/Data Fullword Mode
Copyright © 2011, Texas Instruments Incorporated
Peripheral and Electrical Specifications
57
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