SM320C6727B-EP Datasheet, PDF (81/109 Pages) Texas Instruments – Floating-Point Digital Signal Processor

SM320C6727B-EP
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SPRS793A – SEPTEMBER 2011 – REVISED OCTOBER 2011
4.14.2 SPI Peripheral Registers Description(s)
Table 4-24 is a list of the SPI registers.
SPI0
BYTE ADDRESS
0x4700 0000
0x4700 0004
0x4700 0008
0x4700 000C
0x4700 0010
0x4700 0014
0x4700 0018
0x4700 001C
0x4700 0020
0x4700 0024
0x4700 0028
0x4700 002C
0x4700 0030
0x4700 0034
0x4700 0038
0x4700 003C
0x4700 0040
0x4700 0044
0x4700 0048
0x4700 004C
0x4700 0050
0x4700 0054
0x4700 0058
0x4700 005C
0x4700 0060
0x4700 0064
Table 4-24. SPIx Configuration Registers
SPI1
BYTE ADDRESS
0x4800 0000
0x4800 0004
0x4800 0008
0x4800 000C
0x4800 0010
0x4800 0014
0x4800 0018
0x4800 001C
0x4800 0020
0x4800 0024
0x4800 0028
0x4800 002C
0x4800 0030
0x4800 0034
0x4800 0038
0x4800 003C
0x4800 0040
0x4800 0044
0x4800 0048
0x4800 004C
0x4800 0050
0x4800 0054
0x4800 0058
0x4800 005C
0x4800 0060
0x4800 0064
REGISTER NAME
SPIGCR0
SPIGCR1
SPIINT0
SPILVL
SPIFLG
SPIPC0
SPIPC1
SPIPC2
SPIPC3
SPIPC4
SPIPC5
Reserved
Reserved
Reserved
SPIDAT0
SPIDAT1
SPIBUF
SPIEMU
SPIDELAY
SPIDEF
SPIFMT0
SPIFMT1
SPIFMT2
SPIFMT3
TGINTVECT0
TGINTVECT1
DESCRIPTION
Global Control Register 0
Global Control Register 1
Interrupt Register
Interrupt Level Register
Flag Register
Pin Control Register 0 (Pin Function)
Pin Control Register 1 (Pin Direction)
Pin Control Register 2 (Pin Data In)
Pin Control Register 3 (Pin Data Out)
Pin Control Register 4 (Pin Data Set)
Pin Control Register 5 (Pin Data Clear)
Reserved - Do not write to this register
Reserved - Do not write to this register
Reserved - Do not write to this register
Shift Register 0 (without format select)
Shift Register 1 (with format select)
Buffer Register
Emulation Register
Delay Register
Default Chip Select Register
Format Register 0
Format Register 1
Format Register 2
Format Register 3
Interrupt Vector for SPI INT0
Interrupt Vector for SPI INT1
Copyright © 2011, Texas Instruments Incorporated
Peripheral and Electrical Specifications
81
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