SM320C6727B-EP Datasheet, PDF (75/109 Pages) Texas Instruments – Floating-Point Digital Signal Processor

SM320C6727B-EP
www.ti.com
SPRS793A – SEPTEMBER 2011 – REVISED OCTOBER 2011
4.13.2 McASP Electrical Data/Timing
4.13.2.1 Multichannel Audio Serial Port (McASP) Timing
Table 4-22 and Table 4-23 assume testing over recommended operating conditions (see Figure 4-31 and
Figure 4-32).
Table 4-22. McASP Timing Requirements^{(1) (2)}
NO.
1
t_c(AHCKRX)
2
t_w(AHCKRX)
3
t_c(ACKRX)
4
t_w(ACKRX)
5
t_{su(AFRXC-ACKRX)}
6
t_{h(ACKRX-AFRX)}
7
t_{su(AXR-ACKRX)}
8
t_h(ACKRX-AXR)
Cycle time, AHCLKR external, AHCLKR input
Cycle time, AHCLKX external, AHCLKX input
Pulse duration, AHCLKR external, AHCLKR input
Pulse duration, AHCLKX external, AHCLKX input
Cycle time, ACLKR external, ACLKR input
Cycle time, ACLKX external, ACLKX input
Pulse duration, ACLKR external, ACLKR input
Pulse duration, ACLKX external, ACLKX input
Setup time, AFSR input to ACLKR internal
Setup time, AFSX input to ACLKX internal
Setup time, AFSR input to ACLKR external input
Setup time, AFSX input to ACLKX external input
Setup time, AFSR input to ACLKR external output
Setup time, AFSX input to ACLKX external output
Hold time, AFSR input after ACLKR internal
Hold time, AFSX input after ACLKX internal
Hold time, AFSR input after ACLKR external input
Hold time, AFSX input after ACLKX external input
Hold time, AFSR input after ACLKR external output
Hold time, AFSX input after ACLKX external output
Setup time, AXRn input to ACLKR internal
Setup time, AXRn input to ACLKR external input
Setup time, AXRn input to ACLKR external output
Hold time, AXRn input after ACLKR internal
Hold time, AXRn input after ACLKR external input
Hold time, AXRn input after ACLKR external output
MIN
20
20
7.5
7.5
greater of 2P or 20 ns
greater of 2P or 20 ns
10
10
8
8
3
3
3
3
0
0
3
3
3
3
8
3
3
3
3
3
(1) ACLKX internal – ACLKXCTL.CLKXM = 1, PDIR.ACLKX = 1
ACLKX external input – ACLKXCTL.CLKXM = 0, PDIR.ACLKX = 0
ACLKX external output – ACLKXCTL.CLKXM = 0, PDIR.ACLKX = 1
ACLKR internal – ACLKRCTL.CLKRM = 1, PDIR.ACLKR =1
ACLKR external input – ACLKRCTL.CLKRM = 0, PDIR.ACLKR = 0
ACLKR external output – ACLKRCTL.CLKRM = 0, PDIR.ACLKR = 1
(2) P = SYSCLK2 period
MAX UNIT
ns
ns
ns
ns
ns
ns
ns
ns
Copyright © 2011, Texas Instruments Incorporated
Peripheral and Electrical Specifications
75
Submit Documentation Feedback
Product Folder Link(s): SM320C6727B-EP