SM320C6727B-EP Datasheet, PDF (21/109 Pages) Texas Instruments – Floating-Point Digital Signal Processor

SM320C6727B-EP
www.ti.com
SPRS793A – SEPTEMBER 2011 – REVISED OCTOBER 2011
2.9.2 Terminal Functions
Table 2-12, the Terminal Functions table, identifies the external signal names, the associated pin/ball
numbers along with the mechanical package designator, the pin type (I, O, IO, OZ, or PWR), whether the
pin/ball has any internal pullup/pulldown resistors, whether the pin/ball is configurable as an IO in GPIO
mode, and a functional pin description.
SIGNAL NAME
EM_A[0]
EM_A[1]
EM_A[2]
EM_A[3]
EM_A[4]
EM_A[5]
EM_A[6]
EM_A[7]
EM_A[8]
EM_A[9]
EM_A[10]
EM_A[11]
EM_A[12]
EM_BA[0]
EM_BA[1]
EM_CS[0]
EM_CS[2]
EM_CAS
EM_RAS
EM_WE
EM_CKE
EM_CLK
EM_WE_DQM[0]
EM_WE_DQM[1]
EM_WE_DQM[2]
EM_WE_DQM[3]
EM_OE
EM_RW
EM_WAIT
Table 2-12. Terminal Functions
PIN
TYPE⁽¹⁾ PULL⁽²⁾ GPIO⁽³⁾
DESCRIPTION
External Memory Interface (EMIF) Address and Control
J16
O
-
N
J15
O
-
N
K15
O
-
N
L16
O
-
N
L15
O
-
N
M16
O
-
N
M15
O
-
N
EMIF Address Bus
N16
O
-
N
N15
O
-
N
P16
O
-
N
H15
O
-
N
P15
O
-
N
P12
O
IPD
N
G15
O
-
N
SDRAM Bank Address and Asynchronous Memory
H16
O
-
N
Low-Order Address
F15
O
-
N
SDRAM Chip Select
E15
O
-
N
Asynchronous Memory Chip Select
R3
O
-
N
SDRAM Column Address Strobe
F16
O
-
N
SDRAM Row Address Strobe
T3
O
-
N
SDRAM/Asynchronous Write Enable
T14
O
-
N
SDRAM Clock Enable
R14
O
-
N
EMIF Output Clock
R4
O
-
N
Write Enable or Byte Enable for EM_D[7:0]
T13
O
-
N
Write Enable or Byte Enable for EM_D[15:8]
P13
O
IPU
N
Write Enable or Byte Enable for EM_D[23:16]
R15
O
IPU
N
Write Enable or Byte Enable for EM_D[31:24]
D15
O
-
N
SDRAM/Asynchronous Output Enable
E16
O
-
N
Asynchronous Memory Read/not Write
D14
I
IPU
N
Asynchronous Wait Input (Programmable Polarity) or
Interrupt (NAND)
(1) TYPE column refers to pin direction in functional mode. If a pin has more than one function with different directions, the functions are
separated with a slash (/).
(2) PULL column:
IPD = Internal Pulldown resistor
IPU = Internal Pullup resistor
(3) If the GPIO column is 'Y', then in GPIO mode, the pin is configurable as an IO unless otherwise marked.
Copyright © 2011, Texas Instruments Incorporated
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