SM320C6727B-EP Datasheet, PDF (56/109 Pages) Texas Instruments – Floating-Point Digital Signal Processor

SM320C6727B-EP
SPRS793A – SEPTEMBER 2011 – REVISED OCTOBER 2011
DSP
EM_D[31:16]/UHPI_HA[15:0]^(A)
UHPI_HCNTL[1:0]
UHPI_HD[15:0]
UHPI_HD[16]/HHWIL
UHPI_HD[31:17]
UHPI_HAS^(B)
UHPI_HBE[1:0]^(C)
UHPI_HRW
UHPI_HDS[2]^(G)
UHPI_HDS[1]^(G)
UHPI_HCS
UHPI_HRDY
AMUTE2/HINT
NC
NC or GPIO
External Host MCU
A[x:y]^(D)
D[15:0]
A[1]^(E)
BE[1:0]^(F)
R/W
WE^(G)
RD^(G)
CS
RDY
INTERRUPT
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A. May be used as EM_D[31:16]
B. Optional for hosts supporting multiplexed address and data. Pull up if not used. Low when address is on the bus.
C. DSP byte enables UHPI_HBE[3:2] are not required in this mode.
D. Two host address lines or host GPIO if address lines are not available.
E. A[1], assuming this address increments from 0 to 1 between two successive 16-bit accesses.
F. Byte Enables (active during reads and writes). Some processors support a byte-enable mode on their write-enable
pins.
G. Only required if needed for strobe timing. Not required if CS meets strobe timing requirements. Tie UHPI_HDS[2] and
UHPI_HDS[1] opposite. For more information, see Figure 4-16.
Figure 4-17. UHPI Multiplexed Host Address/Data Half-Word Mode
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Peripheral and Electrical Specifications
Copyright © 2011, Texas Instruments Incorporated
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