MSP430FR6889 Datasheet, PDF (8/176 Pages) Texas Instruments – Mixed-Signal Microcontrollers

MSP430FR6889, MSP430FR68891, MSP430FR6888, MSP430FR6887
MSP430FR5889, MSP430FR58891, MSP430FR5888, MSP430FR5887
SLASE32A – AUGUST 2014 – REVISED MARCH 2015
4 Terminal Configuration and Functions
4.1 Pin Diagram – PZ Package – MSP430FR688x, MSP430FR688x1
Figure 4-1 shows the 100-pin PZ package pin assignments.
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P4.3/UCA0SOMI/UCA0RXD/UCB1STE
P1.4/UCB0CLK/UCA0STE/TA1.0/S1
P1.5/UCB0STE/UCA0CLK/TA0.0/S0
P1.6/UCB0SIMO/UCB0SDA/TA0.1
P1.7/UCB0SOMI/UCB0SCL/TA0.2
R33/LCDCAP
P6.0/R23
P6.1/R13/LCDREF
P6.2/COUT/R03
P6.3/COM0
P6.4/TB0.0/COM1
P6.5/TB0.1/COM2
P6.6/TB0.2/COM3
P2.4/TB0.3/COM4/S43
P2.5/TB0.4/COM5/S42
P2.6/TB0.5/ESIC1OUT/COM6/S41
P2.7/TB0.6/ESIC2OUT/COM7/S40
P10.2/TA1.0/SMCLK/S39
P5.0/TA1.1/MCLK/S38
P5.1/TA1.2/S37
P5.2/TA1.0/TA1CLK/ACLK/S36
P5.3/UCB1STE/S35
P3.0/UCB1CLK/S34
P3.1/UCB1SIMO/UCB1SDA/S33
P3.2/UCB1SOMI/UCB1SCL/S32
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76
1
75
2
74
3
73
4
72
5
71
6
70
7
69
8
68
9
67
10
66
11
65
12
64
13
63
14
62
15
61
16
60
17
59
18
58
19
57
20
56
21
55
22
54
23
53
24
52
25
51
26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
ESIDVCC
P9.7/ESICI3/A15/C15
P9.6/ESICI2/A14/C14
P9.5/ESICI1/A13/C13
P9.4/ESICI0/A12/C12
P9.3/ESICH3/ESITEST3/A11/C11
P9.2/ESICH2/ESITEST2/A10/C10
P9.1/ESICH1/ESITEST1/A9/C9
P9.0/ESICH0/ESITEST0/A8/C8
P1.0/TA0.1/DMAE0/RTCCLK/A0/C0/VREF-/VeREF-
P1.1/TA0.2/TA1CLK/COUT/A1/C1/VREF+/VeREF+
P1.2/TA1.1/TA0CLK/COUT/A2/C2
P1.3/TA1.2/ESITEST4/A3/C3
P8.7/A4/C4
P8.6/A5/C5
P8.5/A6/C6
P8.4/A7/C7
DVCC2
DVSS2
P7.4/SMCLK/S13
P7.3/TA0.2/S14
P7.2/TA0.1/S15
P7.1/TA0.0/S16
P7.0/TA0CLK/S17
P2.0/UCA0SIMO/UCA0TXD/TB0.6/TB0CLK
On devices with UART BSL: P2.0: BSLTX; P2.1: BSLRX
On devices with I²C BSL: P1.6: BSLSDA; P1.7: BSLSCL
Figure 4-1. 100-Pin PZ Package (Top View)
8
Terminal Configuration and Functions
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Product Folder Links: MSP430FR6889 MSP430FR68891 MSP430FR6888 MSP430FR6887 MSP430FR5889
MSP430FR58891 MSP430FR5888 MSP430FR5887