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MSP430FR6889 Datasheet, PDF (120/176 Pages) Texas Instruments – Mixed-Signal Microcontrollers
MSP430FR6889, MSP430FR68891, MSP430FR6888, MSP430FR6887
MSP430FR5889, MSP430FR58891, MSP430FR5888, MSP430FR5887
SLASE32A – AUGUST 2014 – REVISED MARCH 2015
www.ti.com
Table 6-37. Port PJ (PJ.4 and PJ.5) Pin Functions
PIN NAME (PJ.x) x
FUNCTION
PJDIR.x
CONTROL BITS AND SIGNALS (1)
PJSEL1.5 PJSEL0.5 PJSEL1.4 PJSEL0.4
LFXT
BYPASS
PJ.4/LFXIN
4 PJ.4 (I/O)
I: 0; O: 1
X
X
0
0
X
N/A
0
X
X
1
X
X
Internally tied to DVSS
1
LFXIN crystal mode (2)
X
X
X
0
1
0
LFXIN bypass mode (2)
X
X
X
0
1
1
PJ.5/LFXOUT
5
PJ.5 (I/O)
0
0
0
I: 0; O: 1
0
0
1
X
X
X
1 (3)
0
0
N/A
0
see (4)
see (4)
1
X
0
X
X
1 (3)
0
Internally tied to DVSS
1
see (4)
see (4)
1
X
LFXOUT crystal mode (2)
X
X
X
0
0
0
X
X
1 (3)
1
0
(1) X = Don't care
(2) Setting PJSEL1.4 = 0 and PJSEL0.4 = 1 causes the general-purpose I/O to be disabled. When LFXTBYPASS = 0, PJ.4 and PJ.5 are
configured for crystal operation and PJSEL1.5 and PJSEL0.5 are do not care. When LFXTBYPASS = 1, PJ.4 is configured for bypass
operation and PJ.5 is configured as general-purpose I/O.
(3) When PJ.4 is configured in bypass mode, PJ.5 is configured as general-purpose I/O.
(4) With PJSEL0.5 = 1 or PJSEL1.5 =1 the general-purpose I/O functionality is disabled. No input function is available. Configured as output
the pin will be actively pulled to zero.
120 Detailed Description
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MSP430FR58891 MSP430FR5888 MSP430FR5887