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MSP430FR6889 Datasheet, PDF (66/176 Pages) Texas Instruments – Mixed-Signal Microcontrollers
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MSP430FR6889, MSP430FR68891, MSP430FR6888, MSP430FR6887
MSP430FR5889, MSP430FR58891, MSP430FR5888, MSP430FR5887
SLASE32A – AUGUST 2014 – REVISED MARCH 2015
www.ti.com
Table 5-37. Extended Scan Interface, Sample Capacitor/Ri Timing (1)
over operating free-air temperature range (unless otherwise noted)
CSHC(ESICHx)
PARAMETER
Sample capacitance on selected
ESICHx pin
TEST CONDITIONS
ESIEx(tsm) = 1, ESISH = 1
VCC
2.2 V, 3 V
MIN TYP MAX UNIT
7
9 pF
Ri(ESICHx)
Serial input resistance at the
ESICHx pin
ESIEx(tsm) = 1, ESISH = 1
2.2 V, 3 V
1.5
kΩ
ESISHTSM(3) = 1, measurement
tHold
Maximum hold time (2)
sequence uses at least two ESICHx
inputs, ΔVsample < 3 mV
62
µs
(1) The minimum sampling time (7.6 x tau for 1/2 LSB accuracy) with maximum CSHC(ESICHx) and Ri(ESICHx) and Ri(source) is tsample(min) ~ 7.6
× CSHC(ESICHx) × (Ri(ESICHx) + Ri(source)) with Ri(source) estimated at 3 kΩ, tsample(min) = 319 ns.
(2) The sampled voltage at the sample capacitance varies less than 3 mV (ΔVsample) during the hold time tHold. If the voltage is sampled
after tHold, the sampled voltage may be any other value.
(3) The control bit ESIVSS was renamed to ESISHTSM to avoid confusion with supply pin naming.
66
Specifications
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