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MSP430FR6889 Datasheet, PDF (58/176 Pages) Texas Instruments – Mixed-Signal Microcontrollers
MSP430FR6889, MSP430FR68891, MSP430FR6888, MSP430FR6887
MSP430FR5889, MSP430FR58891, MSP430FR5888, MSP430FR5887
SLASE32A – AUGUST 2014 – REVISED MARCH 2015
www.ti.com
5.13.5.5 ADC
Table 5-24. 12-Bit ADC, Power Supply and Input Range Conditions
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
V(Ax)
PARAMETER
Analog input voltage range(1)
TEST CONDITIONS
All ADC12 analog input pins Ax
VCC
MIN NOM MAX UNIT
0
AVCC V
I(ADC12_B)
single-
ended mode
Operating supply current into
AVCC plus DVCC terminals(2) (3)
fADC12CLK = MODCLK, ADC12ON = 1,
ADC12PWRMD = 0, ADC12DIF = 0,
REFON = 0, ADC12SHTx = 0,
ADC12DIV = 0
3.0 V
2.2 V
145 199
µA
140 190
I(ADC12_B)
differential
mode
Operating supply current into
AVCC plus DVCC terminals(2) (3)
fADC12CLK = MODCLK, ADC12ON = 1,
ADC12PWRMD = 0, ADC12DIF = 1,
REFON = 0, ADC12SHTx= 0,
ADC12DIV = 0
3.0 V
2.2 V
175 245
µA
170 230
CI
Input capacitance
Only one terminal Ax can be selected
at one time
2.2 V
10
15 pF
RI
Input MUX ON resistance
0 V ≤ V(Ax) ≤ AVCC
>2 V
<2 V
0.5
4 kΩ
1
10 kΩ
(1) The analog input voltage range must be within the selected reference voltage range VR+ to VR- for valid conversion results.
(2) The internal reference supply current is not included in current consumption parameter I(ADC12_B).
(3) Approximately 60% (typical) of the total current into the AVCC and DVCC terminal is from AVCC.
Table 5-25. 12-Bit ADC, Timing Parameters
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN TYP MAX UNIT
fADC12CLK
Frequency for specified
performance
For specified performance of ADC12 linearity
parameters with ADC12PWRMD = 0,
If ADC12PWRMD = 1, the maximum is 1/4 of the
0.45
value shown here
5.4
MHz
fADC12CLK
Frequency for reduced
performance
Linearity parameters have reduced performance
32.768
kHz
fADC12OSC Internal oscillator(1)
ADC12DIV = 0, fADC12CLK = fADC12OSC from
MODCLK
4
4.8 5.4
MHz
tCONVERT
Conversion time
REFON = 0, Internal oscillator,
fADC12CLK = fADC12OSC from MODCLK,
ADC12WINC = 0
2.6
3.5
µs
External fADC12CLK from ACLK, MCLK, or SMCLK,
(2)
ADC12SSEL ≠ 0
tADC12ON
Turnon settling time of the ADC See (3)
100
ns
tADC12OFF
Time ADC must be off before
can be turned on again
Note: tADC12OFF must be met to make sure that
tADC12ON time holds
100
ns
tSample
Sampling time
RS = 400 Ω, RI = 4 kΩ, CI = 15 pF, Cpext= 8 pF(4)
1
µs
(1) The ADC12OSC is sourced directly from MODOSC inside the UCS.
(2) 14 x ADC12DIV x 1/fADC12CLK , if ADC12WINC=1 then 15 x ADC12DIV x 1/fADC12CLK
(3) The condition is that the error in a conversion started after tADC12ON is less than ±0.5 LSB. The reference and input signal are already
settled.
(4) Approximately 10 Tau (τ) are needed to get an error of less than ±0.5 LSB: tsample = ln(2n+2) x (RS + RI) x (CI + Cpext), where n = ADC
resolution =12, RS= external source resistance, Cpext = external parasitic capacitance.
58
Specifications
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