MSP430FR6889 Datasheet, PDF (123/176 Pages) Texas Instruments – Mixed-Signal Microcontrollers

www.ti.com
MSP430FR6889, MSP430FR68891, MSP430FR6888, MSP430FR6887
MSP430FR5889, MSP430FR58891, MSP430FR5888, MSP430FR5887
SLASE32A – AUGUST 2014 – REVISED MARCH 2015
Table 6-38. Port PJ (PJ.6 and PJ.7) Pin Functions
PIN NAME (PJ.x) x
FUNCTION
PJDIR.x
CONTROL BITS AND SIGNALS ⁽¹⁾
PJSEL1.7 PJSEL0.7 PJSEL1.6 PJSEL0.6
HFXT
BYPASS
PJ.6/HFXIN
6 PJ.6 (I/O)
I: 0; O: 1
X
X
0
0
X
N/A
0
X
X
1
X
X
Internally tied to DVSS
1
HFXIN crystal mode ⁽²⁾
X
X
X
0
1
0
HFXIN bypass mode ⁽²⁾
X
X
X
0
1
1
PJ.7/HFXOUT
5
PJ.7 (I/O)
0
0
0
I: 0; O: 1
0
0
1
X
X
X
1 ⁽³⁾
0
0
N/A
0
see ⁽⁴⁾
see ⁽⁴⁾
1
X
0
X
X
1 ⁽³⁾
0
Internally tied to DVSS
1
see ⁽⁴⁾
see ⁽⁴⁾
1
X
HFXOUT crystal mode ⁽²⁾
X
X
X
0
0
0
X
X
1 ⁽³⁾
1
0
(1) X = Don't care
(2) Setting PJSEL1.6 = 0 and PJSEL0.6 = 1 causes the general-purpose I/O to be disabled. When HFXTBYPASS = 0, PJ.6 and PJ.7 are
configured for crystal operation and PJSEL1.6 and PJSEL0.7 are do not care. When HFXTBYPASS = 1, PJ.6 is configured for bypass
operation and PJ.7 is configured as general-purpose I/O.
(3) When PJ.6 is configured in bypass mode, PJ.7 is configured as general-purpose I/O.
(4) With PJSEL0.7 = 1 or PJSEL1.7 =1 the general-purpose I/O functionality is disabled. No input function is available. Configured as output
the pin will be actively pulled to zero.
Copyright © 2014–2015, Texas Instruments Incorporated
Detailed Description 123
Submit Documentation Feedback
Product Folder Links: MSP430FR6889 MSP430FR68891 MSP430FR6888 MSP430FR6887 MSP430FR5889
MSP430FR58891 MSP430FR5888 MSP430FR5887