MSP430FR6889 Datasheet, PDF (37/176 Pages) Texas Instruments – Mixed-Signal Microcontrollers

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MSP430FR6889, MSP430FR68891, MSP430FR6888, MSP430FR6887
MSP430FR5889, MSP430FR58891, MSP430FR5888, MSP430FR5887
SLASE32A – AUGUST 2014 – REVISED MARCH 2015
5.12 Thermal Packaging Characteristics⁽¹⁾
θ_JA
θ_JC(TOP)
θ_JB
Ψ_JB
Ψ_JT
θ_JC(BOTTOM)
PARAMETER
Junction-to-ambient thermal resistance, still air⁽²⁾
Junction-to-case (top) thermal resistance⁽³⁾
Junction-to-board thermal resistance⁽⁴⁾
Junction-to-board thermal characterization parameter
Junction-to-top thermal characterization parameter
Junction-to-case (bottom) thermal resistance⁽⁵⁾
PACKAGE
QFP-100 (PZ)
VALUE ⁽¹⁾
49.8
9.7
26.0
0.2
25.7
N/A
UNIT
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
θ_JA
θ_JC(TOP)
θ_JB
Ψ_JB
Ψ_JT
θ_JC(BOTTOM)
Junction-to-ambient thermal resistance, still air⁽²⁾
Junction-to-case (top) thermal resistance⁽³⁾
Junction-to-board thermal resistance⁽⁴⁾
Junction-to-board thermal characterization parameter
Junction-to-top thermal characterization parameter
Junction-to-case (bottom) thermal resistance⁽⁵⁾
QFP-80 (PM)
49.5
°C/W
14.7
°C/W
24.1
°C/W
0.7
°C/W
23.8
°C/W
N/A
°C/W
θ_JA
θ_JC(TOP)
θ_JB
Ψ_JB
Ψ_JT
θ_JC(BOTTOM)
Junction-to-ambient thermal resistance, still air⁽²⁾
Junction-to-case (top) thermal resistance⁽³⁾
Junction-to-board thermal resistance⁽⁴⁾
Junction-to-board thermal characterization parameter
Junction-to-top thermal characterization parameter
Junction-to-case (bottom) thermal resistance⁽⁵⁾
QFP-64 (PN)
55.3
°C/W
16.8
°C/W
26.8
°C/W
0.8
°C/W
26.5
°C/W
N/A
°C/W
θ_JA
θ_JC(TOP)
θ_JB
Ψ_JB
Ψ_JT
θ_JC(BOTTOM)
Junction-to-ambient thermal resistance, still air⁽²⁾
Junction-to-case (top) thermal resistance⁽³⁾
Junction-to-board thermal resistance⁽⁴⁾
Junction-to-board thermal characterization parameter
Junction-to-top thermal characterization parameter
Junction-to-case (bottom) thermal resistance⁽⁵⁾
QFN-64 (RGC)
29.2
°C/W
13.9
°C/W
8.1
°C/W
0.2
°C/W
8.0
°C/W
1.0
°C/W
(1) N/A = not applicable
(2) The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, High-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
(3) The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-
standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
(4) The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB
temperature, as described in JESD51-8.
(5) The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific
JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
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Specifications
37
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MSP430FR58891 MSP430FR5888 MSP430FR5887