MSP430FR6889 Datasheet, PDF (6/176 Pages) Texas Instruments – Mixed-Signal Microcontrollers

MSP430FR6889, MSP430FR68891, MSP430FR6888, MSP430FR6887
MSP430FR5889, MSP430FR58891, MSP430FR5888, MSP430FR5887
SLASE32A – AUGUST 2014 – REVISED MARCH 2015
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2 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from August 28, 2014 to March 9, 2015
Page
• Moved T_stg to Section 5.1 and removed Handling Ratings table.............................................................. 28
• Added Section 5.2, ESD Ratings.................................................................................................. 28
• Changed "I_LPM3,XT12" parameter from "includes SVS" to "excludes SVS" .................................................... 31
• Deleted "RAM disabled." from footnote for I_LPM3,VLO. ........................................................................... 31
• Changed note from "Low-power mode 3, 12-pF crystal, including SVS" to "...excluding SVS", and changed listed
test conditions to exclude SVS .................................................................................................... 31
• Deleted "RAM disabled." from footnote for I_LPM4. ............................................................................... 32
• In the second row of the I_VMID parameter, changed the UNIT from µA to nA, and converted MAX value to new
unit (from 1.6 µA to 1600 nA)...................................................................................................... 67
• Moved "FRAM access time error" interrupt source and "ACCTEIFG" interrupt flag from "System NMI" to "System
Reset" row............................................................................................................................ 74
• Added eUSCI_B1 to list in Section 6.11.22.2 ................................................................................... 88
• Switched PxSEL0.y and PxSEL1.y inputs in Figure 6-1 to correct inputs to multiplexers................................. 90
• Switched P1SEL0.x and P1SEL1.x inputs in P1.0 to P1.3 schematic to show correct inputs to multiplexers.......... 92
• Switched P2SEL0.x and P2SEL1.x inputs in P2.4 to P2.7 schematic to show correct inputs to multiplexers.......... 96
• Switched P6SEL0.x and P6SEL1.x inputs in P6.0 to P6.7 schematic to show correct inputs to multiplexers ........ 104
• Switched P8SEL0.x and P8SEL1.x inputs in P8.4 to P8.7 schematic to show correct inputs to multiplexers ........ 111
• Switched P9SEL0.x and P9SEL1.x inputs in P9.0 to P9.3 schematic to show correct inputs to multiplexers ........ 113
• Switched P9SEL0.x and P9SEL1.x inputs in P9.4 to P9.7 schematic to show correct inputs to multiplexers ........ 115
• Switched PJSEL0.4 and PJSEL1.4 inputs in PJ.4 schematic to show correct inputs to multiplexers .................. 118
• Switched PJSEL0.5 and PJSEL1.5 inputs in PJ.5 schematic to show correct inputs to multiplexers .................. 119
• Switched PJSEL0.6 and PJSEL1.6 inputs in PJ.6 schematic to show correct inputs to multiplexers .................. 121
• Switched PJSEL0.7 and PJSEL1.7 inputs in PJ.7 schematic to show correct inputs to multiplexers .................. 122
• Switched P1SEL0.x and P1SEL1.x inputs in Section 6.11.23.20 schematic ............................................. 124
• Changed Figure 8-1: Corrected "ESI" label. Added note. .................................................................... 160
6
Revision History
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Product Folder Links: MSP430FR6889 MSP430FR68891 MSP430FR6888 MSP430FR6887 MSP430FR5889
MSP430FR58891 MSP430FR5888 MSP430FR5887