MSP430FR6889 Datasheet, PDF (102/176 Pages) Texas Instruments – Mixed-Signal Microcontrollers

MSP430FR6889, MSP430FR68891, MSP430FR6888, MSP430FR6887
MSP430FR5889, MSP430FR58891, MSP430FR5888, MSP430FR5887
SLASE32A – AUGUST 2014 – REVISED MARCH 2015
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6.11.23.9 Port P5, P5.0 to P5.7, Input/Output With Schmitt Trigger
Pin Schematic: see Figure 6-1.
Table 6-25. Port P5 (P5.0 to P5.3) Pin Functions
PIN NAME (P5.x)
P5.0/TA1.1/MCLK/Sz
x
FUNCTION
0 P5.0 (I/O)
TA1CCI1A
TA1.1
N/A
Internally tied to DVSS
N/A
MCLK
Sz ⁽²⁾
CONTROL BITS AND SIGNALS ⁽¹⁾
P5DIR.x P5SEL1.x P5SEL0.x LCDSz
I: 0; O: 1
0
0
0
0
0
1
0
1
0
1
0
0
1
0
1
1
0
1
X
X
X
1
P5.1/TA1.2/Sz
1 P5.1 (I/O)
TA1CCI2A
TA1.2
N/A
Internally tied to DVSS
N/A
N/A
Sz ⁽²⁾
I: 0; O: 1
0
0
0
0
0
1
0
1
0
1
0
0
1
0
1
1
0
1
X
X
X
1
P5.2/TA1.0/TA1CLK/ACLK/Sz
2 P5.2 (I/O)
TA1CCI0B
TA1.0
TA1CLK
Internally tied to DVSS
N/A
ACLK
Sz ⁽²⁾
I: 0; O: 1
0
0
0
0
0
1
0
1
0
1
0
0
1
0
1
1
0
1
X
X
X
1
P5.3/UCB1STE/Sz
3 P5.3 (I/O)
I: 0; O: 1
0
0
0
N/A
Internally tied to DVSS
UCB1STE
0
0
1
0
1
X ⁽³⁾
1
0
0
N/A
Internally tied to DVSS
Sz ⁽²⁾
0
1
1
0
1
X
X
X
1
(1) X = Don't care
(2) The associated LCD segment is package dependent. See the Signal Descriptions tables and Pin Diagrams figures.
(3) Direction controlled by eUSCI_B1 module.
102 Detailed Description
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