MSP430FR6889 Datasheet, PDF (41/176 Pages) Texas Instruments – Mixed-Signal Microcontrollers

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MSP430FR6889, MSP430FR68891, MSP430FR6888, MSP430FR6887
MSP430FR5889, MSP430FR58891, MSP430FR5888, MSP430FR5887
SLASE32A – AUGUST 2014 – REVISED MARCH 2015
Table 5-5. High-Frequency Crystal Oscillator, HFXT⁽¹⁾
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
I_DVCC.HFXT
HFXT oscillator crystal
current HF mode at
typical ESR
f_HFXT
HFXT oscillator crystal
frequency, crystal mode
TEST CONDITIONS
f_OSC = 4 MHz,
HFXTBYPASS = 0, HFXTDRIVE = 0, HFFREQ =
1 ⁽²⁾
T_A = 25°C, C_L,eff = 18 pF, Typical ESR, C_shunt
f_OSC = 8 MHz,
HFXTBYPASS = 0, HFXTDRIVE = 1, HFFREQ = 1,
T_A = 25°C, C_L,eff = 18 pF, Typical ESR, C_shunt
f_OSC = 16 MHz,
HFXTBYPASS = 0, HFXTDRIVE = 2, HFFREQ = 2,
T_A = 25°C, C_L,eff = 18 pF, Typical ESR, C_shunt
f_OSC = 24 MHz,
HFXTBYPASS = 0, HFXTDRIVE = 3, HFFREQ = 3,
T_A = 25°C, C_L,eff = 18 pF, Typical ESR, C_shunt
HFXTBYPASS = 0, HFFREQ = 1 ⁽²⁾⁽³⁾
HFXTBYPASS = 0, HFFREQ = 2⁽³⁾
HFXTBYPASS = 0, HFFREQ = 3⁽³⁾
V_CC
3.0 V
MIN TYP
75
120
190
250
4
8.01
16.01
DC_HFXT
f_HFXT,SW
HFXT oscillator duty
cycle
HFXT oscillator logic-
level square-wave input
frequency, bypass mode
Measured at SMCLK, f_HFXT = 16 MHz
HFXTBYPASS = 1, HFFREQ = 0⁽⁴⁾⁽³⁾
HFXTBYPASS = 1, HFFREQ = 1 ⁽⁴⁾⁽³⁾
HFXTBYPASS = 1, HFFREQ = 2 ⁽⁴⁾⁽³⁾
HFXTBYPASS = 1, HFFREQ = 3 ⁽⁴⁾⁽³⁾
40%
0.9
4.01
8.01
16.01
50%
HFXT oscillator logic-
DC_{HFXT, SW} level square-wave input
duty cycle
HFXTBYPASS = 1
40%
f_OSC = 4 MHz,
HFXTBYPASS = 0, HFXTDRIVE = 0, HFFREQ = 1, 3.0 V
1.6
t_START,HFXT Start-up time⁽⁵⁾
T_A = 25°C, C_L,eff = 16 pF
f_OSC = 24 MHz ,
HFXTBYPASS = 0, HFXTDRIVE = 3, HFFREQ = 3, 3.0 V
0.6
T_A = 25°C, C_L,eff = 16 pF
Integrated load
C_HFXIN
capacitance at HFXIN
2
terminaI^{(6) (7)}
Integrated load
C_HFXOUT
capacitance at HFXOUT
2
terminaI^{(6) (7)}
MAX
8
16
24
60%
4
8
16
24
60%
UNIT
μA
MHz
MHz
ms
pF
pF
(1) To improve EMI on the HFXT oscillator the following guidelines should be observed.
• Keep the traces between the device and the crystal as short as possible.
• Design a good ground plane around the oscillator pins.
• Prevent crosstalk from other clock or data lines into oscillator pins HFXIN and HFXOUT.
• Avoid running PCB traces underneath or adjacent to the HFXIN and HFXOUT pins.
• Use assembly materials and processes that avoid any parasitic load on the oscillator HFXIN and HFXOUT pins.
• If conformal coating is used, ensure that it does not induce capacitive or resistive leakage between the oscillator pins.
(2) HFFREQ = {0} is not supported for HFXT crystal mode of operation.
(3) Maximum frequency of operation of the entire device cannot be exceeded.
(4) When HFXTBYPASS is set, HFXT circuits are automatically powered down. Input signal is a digital square wave with parametrics
defined in the Schmitt-trigger Inputs section of this datasheet. Duty cycle requirements are defined by DC_{HFXT, SW}.
(5) Includes start-up counter of 1024 clock cycles.
(6) This represents all the parasitic capacitance present at the HFXIN and HFXOUT terminals, respectively, including parasitic bond and
package capacitance. The effective load capacitance, C_L,eff can be computed as C_IN x C_OUT / (C_IN + C_OUT), where C_IN and C_OUT is the
total capacitance at the HFXIN and HFXOUT terminals, respectively.
(7) Requires external capacitors at both terminals to meet the effective load capacitance specified by crystal manufacturers. Recommended
effective load capacitance values supported are 14 pF, 16 pF, and 18 pF. Maximum shunt capacitance of 7 pF. The PCB adds
additional capacitance, so it must also be considered in the overall capacitance. It is recommended to verify that the recommended
effective load capacitance of the selected crystal is met.
Copyright © 2014–2015, Texas Instruments Incorporated
Specifications
41
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