DS90UH948-Q1 Datasheet, PDF (71/91 Pages) Texas Instruments – FPD-Link III to OpenLDI Deserializer

www.ti.com
DS90UH948-Q1
SNLS473A – OCTOBER 2014 – REVISED JANUARY 2016
Register Maps (continued)
Table 11. Serial Control Bus Registers (continued)
ADD
(hex)
0xC1
Register
Name
HDCP_DBG
2
Bit(s)
7:2
1
Function
RESERVED
NO_DECRYPT
Type
RW
RW
0
HDCP_EN_
RW
MODE
0xC4 HDCP_STS 7:2
1
RESERVED
R
RGB_CHKSUM_ R
ERR
0
AUTHED
R
0xC9 KSV_FIFO_ 7:0 KSV_FIFO_
RW
DATA
DATA
0xCA KSV_FIFO_A 7:0 KSV_FIFO_
RW
DDR0
ADDR0
0xCB KSV_FIFO_A 7:0 KSV_FIFO_
RW
DDR1
ADDR1
0xE0 RPTR_TX0
7:1
0
PORT0_ADDR R
PORT0_VALID R
0xE1 RPTR_TX1
7:1
0
PORT1_ADDR R
PORT1_VALID R
Default
Description
Value (hex)
0
Reserved
0
No Decrypt:
When set to a 1, the HDCP Receiver will output the encrypted
data on the RGB pins. All other functions will work normally.
This provides a simple way of showing that the link is
encrypted.
0
HDCP Enable Mode:
This bit controls whether the HDCP Repeater function will
enable HDCP in attached HDCP Transmitters if it detects
HDCP is already enabled.
1 : Don't re-enable HDCP if already enabled.
0 : Re-enable HDCP at start of authentication, even if HDCP
Transmitter already has HDCP enabled.
0
Reserved
0
RGB Checksum Error Detected:
If RGB Checksum in enabled through the HDCP Transmitter
HDCP_DBG register, this bit will indicate if a checksum error is
detected. This register may be cleared by writing any value to
this register
0
HDCP Authenticated:
Indicates the HDCP authentication has completed suc-cessfully.
The controller may now send video data re-quiring content
protection. This bit will be cleared if authentication is lost or if
the controller restarts authen-tication.
0x00
KSV_FIFO_DATA:
During External Repeater Control mode, the External HDCP
controller writes KSV data to the KSV FIFO through this
register. A byte written to this register location will write one
byte of KSV data to the KSV FIFO at the location indicated by
the KSV_FIFO_ADDR registers.
0x00
KSV FIFO Address Register 0:
This register contains the lower 8 bits of the KSF FIFO Address.
This value should be set to 0 before writing the first byte of KSV
data to the KSV FIFO. The KSV FIFO Address will
automatically increment for each write to the KSV_FIFO_DATA
register.
0x00
KSV FIFO Address Register 1:
This register contains the most significant bit of the KSF FIFO
Address. This value should be set to 0 before writing the first
byte of KSV data to the KSV FIFO. The KSV FIFO Address will
automatically increment for each write to the KSV_FIFO_DATA
register.
HDCP Repeater Transmit Port 0 Register
0
Transmit Port 0 I2C Address
Indicates the I2C address for the Repeater Transmit Port.
0
Transmit Port 0 Valid
Indicates that the HDCP Repeater has a transmit port at the I2C
Address identified by upper 7 bits of this register
HDCP Repeater Transmit Port 1 Register
0
Transmit Port 1 I2C Address
Indicates the I2C address for the Repeater Transmit Port.
0
Transmit Port 1 Valid
Indicates that the HDCP Repeater has a transmit port at the I2C
Address identified by upper 7 bits of this register
Copyright © 2014–2016, Texas Instruments Incorporated
Product Folder Links: DS90UH948-Q1
Submit Documentation Feedback
71