DS90UH948-Q1 Datasheet, PDF (62/91 Pages) Texas Instruments – FPD-Link III to OpenLDI Deserializer

DS90UH948-Q1
SNLS473A – OCTOBER 2014 – REVISED JANUARY 2016
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Register Maps (continued)
Table 11. Serial Control Bus Registers (continued)
ADD
(hex)
0x28
Register
Name
Datapath
Control 2
Bit(s) Function
Type
7
OVERRIDE FC RW
CONFIG
6
RESERVED
RW
5
VIDEO_
RW
DISABLED
(Loaded from
remote SER)
4
DUAL_LINK
R
(Loaded from
remote SER)
3
2
1
0
0x29 FRC Control 7
6
5
4
3
2
1
0
ALTERNATE I2S RW
ENABLE
(Loaded from
remote SER)
I2S DISABLED RW
(Loaded from
remote SER)
28BIT VIDEO
RW
(Loaded from
remote SER)
I2S SURROUND RW
(Loaded from
remote SER)
Timing Mode
RW
Select
HS Polarity
RW
VS Polarity
RW
DE Polarity
RW
FRC2 Enable
RW
FRC1 Enable
RW
Hi-FRC2 Disable RW
Hi-FRC1 Disable RW
Default
Description
Value (hex)
0
1: Disable loading of this register from the forward channel,
keeping locally witten values intact
0: Allow forward channel loading of this register
0
Reserved
0
Forward channel video disabled
0 : Normal operation
1 : Video is disabled, control channel is enabled
This is a status bit only, indicating the forward channel is not
sending active video. In this mode, the control channel and
GPIO functions are enabled. Setting OVERRIDE_FC_CONFIG
will prevent this bit from changing.
1: Dual Link mode enabled
0: Single Link mode enabled
This bit will always be loaded from forward channel and cannot
be written locally. To force DUAL_LINK receive mode, use the
RX_PORT_SEL register (address 0x34)
0
1: Enable alternate I2S output on GPIO1 (word clock) and
GPIO0 (data)
0: Normal Operation
0
1: I2S DISABLED
0: Normal Operation
0
1: 28 bit Video enable. i.e. HS, VS, DE are present in forward
channel.
0: Normal Operation
0
1: I2S Surround enabled
0: I2S Surround disabled
0
Select display timing mode
0: DE only Mode
1: Sync Mode (VS,HS)
0
0: Active High
1: Active Low
0
0: Active High
1: Active Low
0
0: Active High
1: Active Low
0
0: FRC2 disable
1: FRC2 enable
0
0: FRC1 disable
1: FRC1 enable
0
0: Hi-FRC2 enable
1: Hi-FRC2 disable
0
0: Hi-FRC1 enable
1: Hi-FRC1 disable
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