DS90UH948-Q1 Datasheet, PDF (18/91 Pages) Texas Instruments – FPD-Link III to OpenLDI Deserializer

DS90UH948-Q1
SNLS473A – OCTOBER 2014 – REVISED JANUARY 2016
Timing Diagrams and Test Circuits (continued)
tBIT
CLK[2:1]±
D[7:0]±
tPPOS0
tPPOS1
tPPOS2
tPPOS3
tPPOS4
tPPOS5
tPPOS6
tPPOS7
bit 1
bit 0
bit 6
bit 5
n-1
n-1
n
n
1UI
2UI
3UI
4UI
5UI
6UI
7UI
bit 4
n
bit 3
n
bit 2
n
bit 1
n
bit 0
n
Figure 11. FPD-Link Transmitter Pulse Positions
BISTEN
PASS
(w/errors)
Prior BIST Result
Current BIST Test - Toggle on Error
1/2 V_DDIO
t_PASS
1/2 V_DDIO
Result Held
Figure 12. BIST PASS Waveform
SDA
t_f
SCL
START
t_LOW
t_r
t_f
t_HD;STA
t_BUF
t_r
t_HD;STA
t_HD;DAT
t_HIGH
t_SU;DAT
t_SU;STA
t_SU;STO
REPEATED
START
STOP START
Figure 13. Serial Control Bus Timing Diagram
I2S_CLK
I2S_WC
I2S_D[A,B,C,D]
t_I2S
t_LC,I2S
t_SR,I2S
t_HC,I2S
V_IH
V_IL
t_HR,I2S
Figure 14. I2S Timing
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