DS90UH948-Q1 Datasheet, PDF (67/91 Pages) Texas Instruments – FPD-Link III to OpenLDI Deserializer

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DS90UH948-Q1
SNLS473A – OCTOBER 2014 – REVISED JANUARY 2016
Register Maps (continued)
ADD
(hex)
0x49
Register
Name
FPD_TX_
MODE
0x4B LVDS
CONTROL
0x52
CML
OUTPUT
CTL1
0x56
CML
OUTPUT
ENABLE
0x57
CML
OUTPUT
CTL2
Table 11. Serial Control Bus Registers (continued)
Bit(s) Function
Type
7
MAPSEL MODE R
6
MAPSEL OVER RW
WRITE
5
MAPSEL REG RW
BIT
4:2 RESERVED
R
1:0 FPD_OUT_
RW
MODE
7:2 RESERVED
RW
1:0 LVDS VOD
RW
CONTROL
7
CML CHANNEL RW
SELECT 1
6:0 RESERVED
RW
7:4 RESERVED
RW
3
CMLOUT
RW
ENABLE
2:0 RESERVED
RW
7:3 RESERVED
RW
2:1 CML CHANNEL RW
SELECT 2
0
RESERVED
RW
Default
Description
Value (hex)
Strap
Mapsel Pin Status
Strap option on the MODE_SEL0 pin
0
Mapsel Over Write enable from register configuration
0
0
Strap
0x02
0
0
0
0
0
0
0
0
0
Register setting of MAPSEL mode if MAPSEL OVER WRITE is
set
Reserved
FPD/OLDI output mode
Controls single/dual operation of the FPD Transmit ports
00 : Dual FPD/OLDI output
01 : Dual SWAP FPD/OLDI output
10 : Single FPD/OLDI output
11 : Replicate FPD/OLDI output
The FPD_OUT_MODE register bits are loaded at reset from the
MODE_SEL0 pin strap options.
Reserved
FPD/OLDI Output VOD Setting
00: Setting 1 - 190mV typical voltage swing (single-ended)
01: Setting 2 - 275mV typical voltage swing (single-ended)
10: Setting 3 - 325mV typical voltage swing (single-ended)
11: Setting 4 - 375mV typical voltage swing (single-ended)
Selects between PORT0 and PORT1 to output onto CMLOUT±.
0: Recovered forward channel data from RIN0± is output on
CMLOUT±
1: Recovered forward channel data from RIN1± is output on
CMLOUT±
CMLOUT driver must be enabled by setting 0x56[3] = 1.
Note: This bit must match 0x57[2:1] setting for PORT0 or
PORT1.
Reserved
Reserved
Enable CMLOUT± Loop-through Driver
0: Disabled (Default)
1: Enabled
Reserved
Reserved
Selects between PORT0 and PORT1 to output onto CMLOUT±.
01: Recovered forward channel data from RIN0± is output on
CMLOUT±
10: Recovered forward channel data from RIN1± is output on
CMLOUT±
CMLOUT driver must be enabled by setting 0x56[3] = 1.
Note: This must match 0x52[7] setting for PORT0 or PORT1.
Reserved
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