THS3217 Datasheet, PDF (60/73 Pages) Texas Instruments – THS3217 DC to 800-MHz, Differential-to-Single-Ended, DAC Output Amplifier

THS3217
SBOS766B – FEBRUARY 2016 – REVISED FEBRUARY 2016
10.1.1.5 Differential I/O Driver With independent Common-Mode Control
VMID_OUT
VO1
16
15
+
VMID_IN
±
1
50 k
2 x1
50 k
x1
50
49.9
Differential
VIN
+
250
500
3 x1
49.9
14
100
13
18.5 k
274
12
274
11
VOUT = VMID_OUT ± 2VIN
Differential
Filter
10
18.5 k
Differential
Input Mixer
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VPATHSEL > 1.3 V
4
9
VMID_OUT
5
6
7
8
VO1= VMID_OUT + 2VIN
Figure 105. Differential I/O Line Driver
10.1.1.5.1 Design Requirements
Certain applications require the differential DAC output voltage to be level-translated from one common-mode
(compliance) level to a differential output at a different common-mode level. The THS3217 performs this function
directly using the very flexible blocks provided internally. Figure 105 shows an example of such an application,
where the differential gain is always 4 V/V. The differential gain is fine-tuned down by setting the insertion loss in
the differential post-filter. The considerations critical to this application include:
1. The input is dc-coupled with the appropriate termination impedance required by the DAC. Use a high-
frequency, antialiasing filter at the input to limit DAC feedthrough in the deselected OPS internal input.
2. The output common-mode control is set with the voltage applied to the VMID buffer input at VMID_IN (pin 1).
The circuit is configured so that the output at VMID_OUT (pin 15) drives both VREF (pin 14), in order to set
the D2S dc output voltage, and VIN+ (pin 9).
3. The D2S output available at VO1 (pin 6) provides one side of the differential-output, and is dc-biased at
V_{MID_OUT}. This VO1 also drives the R_G resistor for the OPS in an inverting gain of –1 V/V. The dc bias level at
the R_G input and the V+ input of the OPS are the same voltage; therefore, no level shift through the OPS
occurs. The OPS outputs an inverted version of the D2S output signal at the same common-mode voltage
(V_{MID_OUT}). The wideband, differential signal with independent output common-mode voltage control can now
be applied to a differential filter and on to the next stage.
4. Make sure that the differential filter only has differential resistors and capacitors. Termination resistors to
ground level shift the input common-mode voltage, while differential resistors transfers the desired V_{MID_OUT}
directly through the filter.
5. If the desired V_{MID_OUT} + differential signal combined clips in the OPS or D2S stages, offset the supplies to
gain headroom. For instance, if a 5-V output common-mode voltage is required with a 10-V_PP differential
signal, the OPS and D2S must deliver 2.5-V to 7.5-V output swings. The D2S has the higher headroom
requirement at 1.55 V (max). Operating the THS3217 with –5 V and +10 V supplies stays within the rated
maximum of 15.8 V total supply range, and provide adequate headroom for the positive offset swing
requirement. Note that the logic lines are still referenced to GND by pin 7. Tying PATHSEL (pin 4) to +V_CC
holds this design in the external path mode required.
60
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