THS3217 Datasheet, PDF (36/73 Pages) Texas Instruments – THS3217 DC to 800-MHz, Differential-to-Single-Ended, DAC Output Amplifier

THS3217
SBOS766B – FEBRUARY 2016 – REVISED FEBRUARY 2016
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Feature Description (continued)
In the flat region, the 1-µF capacitor reduces the midscale buffer output spot noise from approximately 55 nV/√Hz
to 4.4 nV/√Hz. If the noise below 100 Hz is unacceptable, either add a low-noise buffer to drive this input, or add
lower-value resistors externally to set up the midsupply bias. Also, consider the noise impact of any reference
voltage source driving the midscale buffer path.
9.3.3 Output Power Stage (OPS) (Pins 4, 7, 9, 10, 11, and 12)
This wideband current-feedback amplifier (CFA) provides a flexible output driver with several unique features.
The OPS can be left unused if the specific application only uses the D2S alone, or a combination of the D2S with
an off-chip power driver. If left unused, simply tie DISABLE (pin 10) and PATHSEL (pin 4) to the positive supply.
This logic configuration turns the OPS off and opens up the external and internal OPS noninverting input paths.
An internal fixed 18.5-kΩ resistor holds the external input pin at the logic reference voltage on pin 7. Additionally,
the OPS output is connected to the inverting input through another internal 18.5-kΩ resistor when no external
resistors are installed on pins 9, 11, or 12. Disabling the OPS saves approximately 21 mA of supply current from
the nominal total 54 mA with all stages operating on ±6-V supplies.
The noninverting input to the OPS provides two possible paths controlled by the PATHSEL logic control, pin 4.
With the logic reference (pin 7) at ground, floating pin 4 or controlling it to a voltage < 0.7 V connects the input
path directly to the internal D2S output. Tying pin 4 to the positive supply, or controlling it to a logic level > 1.3 V,
connects the input path to the external input at pin 9. The intent for this switched input is to allow an external filter
to be inserted between the D2S output and OPS inputs when needed, and bypass the filter when not.
Alternatively, this switched input also allows a completely different signal path to be inserted at the OPS input,
independent of that available at the internal D2S output.
In situations where the D2S output at pin 6 is switched into another off-chip power driver, the OPS can be
disabled using pin 10. With the logic reference (pin 7) at ground, floating pin 10, or controlling it to a voltage < 0.7
V, enables the OPS. Tying pin 10 to the positive supply, or controlling it to a logic level > 1.3 V, disables the
OPS.
Operation of the wideband, current-feedback OPS requires an external feedback resistor and a gain element.
After configuring, the OPS can amplify the D2S output through either the noninverting path, or be configured as
an inverting amplifier stage using the external OPS input at pin 9 as a dc reference.
One of the first considerations when designing with the OPS is determining the external resistor values as a
function of gain in order to hold the best ac performance. The loop gain (LG) of a CFA is set by the internal
open-loop transimpedance gain from the inverting error current to the output, and the effective feedback
impedance to the inverting input. The nominal internal open-loop transimpedance gain and phase are shown in
Figure 82.
140
45
Gain
120
Phase 0
100
-45
80
-90
60
-135
40
-180
20
1k
-225
10k 100k
1M
10M 100M 1G
Frequency (Hz)
C502
Figure 82. Simulated OPS Z_OL Gain And Phase
36
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