THS3217 Datasheet, PDF (40/73 Pages) Texas Instruments – THS3217 DC to 800-MHz, Differential-to-Single-Ended, DAC Output Amplifier

THS3217
SBOS766B – FEBRUARY 2016 – REVISED FEBRUARY 2016
www.ti.com
Using the values of R_F and R_G listed in Table 2, a swept gain output- and input-referred noise estimate is
computed, as shown in Table 3. In this sweep, R_S = 0 Ω. The input-referred noise (E_ni) in Table 2 is at the
noninverting input of the OPS. To refer the noise to the D2S differential inputs, divide the output noise by two if
there is no interstage loss. Dividing the E_ni column by 2 V/V shows that the OPS noise contribution is negligible
when referred to the D2S inputs, where the 9-nV/√Hz differential input noise dominates. Operating with higher
feedback resistors in the OPS quickly increases the output noise due to the inverting input current noise term.
Although increasing R_F improves phase margin (for example, when driving a capacitive load), be careful to check
the total output noise using Equation 17.
Table 3. Total Input- and Output-Referred Noise of the OPS Versus Gain
TARGET GAIN
(V/V)
1.5
2
2.5
3
3.5
4
4.5
5
5.5
6
6.5
7
7.5
8
8.5
9
9.5
10
BEST R_F
(Ω)
294
274
249
232
205
182
165
140
121
113
115
121
133
143
154
162
174
187
BEST R_G
(Ω)
562
267
162
113
80.6
59
46.4
34.8
26.7
22.1
20.5
20
20
20
20
20
20
20.5
E_O
(nV/√Hz)
10.4
11.3
12.3
13.5
14.7
15.9
17.2
18.6
20.0
21.4
22.9
24.4
25.9
27.4
29.0
30.5
32.1
33.6
E_in
(nV/√Hz)
6.9
5.6
4.9
4.5
4.2
4.0
3.8
3.7
3.6
3.6
3.5
3.5
3.5
3.4
3.4
3.4
3.4
3.4
Operating the OPS as an inverting amplifier is also possible. When driving the OPS directly from the D2S to the
R_G resistor, use the values shown in Table 2 for the noninverting mode to achieve good results. Note that the R_G
resistor is the load for the D2S stage. Operating with the D2S driving an R_G < 80 Ω increases the harmonic
distortion of the D2S. In that case, scaling R_F and R_G up to reduce the loading may result in better system
performance at the cost of a lower OPS bandwidth. Driving the D2S output at pin 6 into the OPS in an inverting
mode allows for the option to select the external input of the OPS, and drive another signal or dc level into the
noninverting input at pin 9. In order to reduce layout parasitics, consider splitting the R_G resistor in two, with the
first half close to pin 6 and the second half close to pin 12. Splitting R_G in this manner places the trace
capacitance inside the two resistors keeping both active nodes more stable. Also, open up the ground and power
planes under the trace, if possible.
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