THS3217 Datasheet, PDF (39/73 Pages) Texas Instruments – THS3217 DC to 800-MHz, Differential-to-Single-Ended, DAC Output Amplifier

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THS3217
SBOS766B – FEBRUARY 2016 – REVISED FEBRUARY 2016
Using R_F values greater than the recommended values in Table 2 band-limits the response, whereas using less
than the recommended R_F values peaks the response. Using the values shown in Table 2 results in an
approximately constant SSBW (see Figure 25. Holding a more constant loop-gain over the external gain setting
also acts to hold a more constant output impedance profile, as shown in Figure 84. The swept-frequency, closed-
loop, output impedance is shown for gains of 2.5 V/V, 5 V/V, and 10 V/V using the R_F and R_G values of Table 2.
The first two steps do a good job of delivering the same (and very low) output impedance over frequency, while
the gain of 10 V/V shows the expected higher closed-loop output impedance due to the reduced loop-gain and
bandwidth.
10
1
0.1
0.01
1M
10M
Frequency (Hz)
Gain = 2.5 V/V
Gain = 5 V/V
Gain = 10 V/V
100M
D504
Figure 84. OPS Closed-Loop Output Impedance vs Gain Setting
Reducing the R_F value with increasing gain also helps minimize output noise versus a fixed R_F design. See
Figure 39 for the three noise terms for the OPS. The total output noise calculation is shown in Equation 17:
e_o
e_ni2 4kTR_S i_bnR_S ² NG² i_biR_F ² 4kTR_F NG
where
•
•
•
R_S is the source impedance on the noninverting input. If the OPS is driven from the D2S stage directly using
the internal path, R_S ≈ 0 Ω.
NG = (1 + R_F / R_G) for the design point.
The flat-band noise numbers for the OPS are:
– E_ni = 3.2 nV/√Hz
– I_bn = 2.7 pA/√Hz
– I_bi = 30 pA/√Hz
(17)
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