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THS3217 Datasheet, PDF (19/73 Pages) Texas Instruments – THS3217 DC to 800-MHz, Differential-to-Single-Ended, DAC Output Amplifier
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THS3217
SBOS766B – FEBRUARY 2016 – REVISED FEBRUARY 2016
7.12 Typical Characteristics: Midscale (DC) Reference Buffer
at +VCC = 6.0 V, –VCC = –6.0 V, RLOAD = 150 Ω, and TA ≈ 25˚C (unless otherwise noted)
1
0.6
0
100 mVPP
0.4
1 VPP
-1
-2
0.2
-3
0
-4
-5
-0.2
-6
-0.4
-7
0.1VPP
1.0VPP
-8
-0.6
1M
10M
100M
700M
Frequency (Hz)
D049
Time (20 ns/div)
D050
Figure 49. Frequency Response vs Output Voltage
10
IO = -20 mA
IO = 0 mA
IO = 20 mA
1
0.1
Frequency (Hz)
D051
Figure 50. Step Response
60
GND I/P, ILOAD= 0 mA
50
GND I/P, ILOAD= -20 mA
GND I/P, ILOAD= 20 mA
Float I/P, ILOAD= 0 mA
40
Float I/P, ILOAD= -20 mA
Float I/P, ILOAD= 20 mA
30
20
10
0
-10
-40 -20
0 20 40 60 80
Junction Temperature (qC)
100 120
D052
Figure 51. Buffer Output Impedance vs Load Current
5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
1n
10n
100n
Load Capacitance (F)
D053
RLOAD = 150 Ω in parallel with CLOAD, see the Midscale Buffer
ROUT Versus CLOAD Measurement section for circuit setup
Figure 53. Series Output Resistance vs Capacitive Load
Figure 52. Buffer Output Offset vs Load Current (ILOAD)
3
0
-3
-6
No Cap
-9
1 nF
10 nF
100 nF
-12
1M
10M
100M
500M
Frequency (Hz)
D054
VOUT = 100 mVPP, RLOAD = 150 Ω in parallel with CLOAD, see
Midscale Buffer ROUT Versus CLOAD Measurement for circuit setup
Figure 54. Frequency Response vs Capacitive Load
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