TMDS171 Datasheet, PDF (53/62 Pages) Texas Instruments – 3.4 Gbps TMDS RETIMER

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11.2 Layout Example
ARC_OUT
GND
1µF
55Q
SCL_SRC
SDA_SRC
V_CC
2kQ
V_CC
2kQ
SWAP/POL ^VCC
65kQ
GND
65kQ
IN_D2p/n
1
HPD_SRC
IN_D1p/n
IN_D0p/n
I2C_EN/PIN ^VCC
65kQ
GND
65kQ
GND
IN_CLKp/n
SCL_CTL
V_CC
2kQ
V_CC
2kQ
SDA_CTL
Match High Speed traces
length as close as possible to
minimize Skew
TMDS171, TMDS171I
SLLSEN7A – OCTOBER 2015 – REVISED DECEMBER 2015
1µF
GND
SPDIF_IN
2kQ
5V
SDA_SNK
2kQ
5V
SCL_SNK
Match High Speed traces
length as close as possible to
minimize Skew
65kQ
V_CC
TX_TERM_CTL
65kQ
GND
OUT_D2p/n
HPD_SNK
OUT_D1p/n
GND
OUT_D0p/n
65kQ
65kQ
V_{CC A1}
GND
OUT_CLKp/n
Place V_CC and V_DD decoupling
caps as close to V_CC and V_DD
pins as possible
VSADJ
(1) If ARC is not used a 500KΩ resistor should be tied to GND at the SPDIF_IN pin
(2) The 55-Ω resistor to GND on the ARC_OUT pin is implementation specific and my not be needed if it is already
implemented elsewhere.
Figure 63. Layout
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