TMDS171 Datasheet, PDF (14/62 Pages) Texas Instruments – 3.4 Gbps TMDS RETIMER

TMDS171, TMDS171I
SLLSEN7A – OCTOBER 2015 – REVISED DECEMBER 2015
Parameter Measurement Information (continued)
Data +
Data -
Parallel⁽⁶⁾
BERT
[No Pre-
emphasis]
Clk+
Clk-
SMA
Coax
SMA
Coax
RX
+EQ
OUT
FR4 PCB trace⁽¹⁾
Device
SMA
Coax
Coax
SMA
RX
+EQ
OUT
SMA
Coax
SMA
Coax
FR4 PCB trace
SMA
Coax
SMA
Coax
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Avcc⁽⁴⁾
RT RT(5)
REF
Cable
EQ
AVcc
Jitter Test
Instrument^(2,3)
RT RT
REF
Cable
EQ
Jitter Test
Instrument^(2,3)
TTP1
TTP2
TTP3
TTP4
TTP4_EQ
(1) The FR4 trace between TTP1 and TTP2 is designed to emulate 1-8” of FR4, connector and another 1-8” of FR4.
Trace width – 4 mils. 100 Ω differential impedance.
(2) All Jitter is measured at a BER of 10^-9
(3) Residual jitter reflects the total jitter measured at TTP4 minus the jitter measured at TTP1
(4) AVCC = 3.3 V
(5) R_T = 50 Ω
(6) The input signal from parallel Bert does not have any pre-emphasis. Refer to Recommended Operating Conditions.
Figure 10. Jitter Measurement Circuit
690
90
0
-90
-690
75ps
75ps
Absolute Time
Normalized Time: t_bit
75ps
75ps
Figure 11. HDMI Output Jitter Measurement
14
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