TMDS171 Datasheet, PDF (50/62 Pages) Texas Instruments – 3.4 Gbps TMDS RETIMER

TMDS171, TMDS171I
SLLSEN7A – OCTOBER 2015 – REVISED DECEMBER 2015
www.ti.com
10 Power Supply Recommendations
To minimize the power consumption of customer application, TMDS171 used the dual power supply. V_CC is 3.3 V
with 5% range to support the I/O voltage. The V_DD is 1.2 V with 1.1 V to 1.27 V range to supply the internal digital
control circuit. TMDS171 operates in 3 different working states.
• o Power down Mode:
– OE = Low puts the device into its lowest power state by shutting down all function blocks.
– When OE is re-asserted the transitions from L→H will create a reset and if the device is programmed
through I²C it must to be reprogrammed.
– Writing a 1 to register 09h[3].
– OE = High, HPD_SNK = Low
• Standby Mode: HPD_SNK = High but no valid clock signal detect on clock lane.
• Normal operation: Working in Redriver or Retimer
• When HPD assert, the device CDR and output will enable based on the signal detector circuit result.
• HPD_SRC = HPD_SNK in all conditions.
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