TMDS171 Datasheet, PDF (25/62 Pages) Texas Instruments – 3.4 Gbps TMDS RETIMER

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1600
1400
V_OD No Term
V_OD 150 to 300 :
1200
1000
800
600
400
200
0
4 4.5 5 5.5 6 6.5 7 7.5 8
V_sadj (k:)
D003
1600
1400
1200
1000
800
600
400
200
0
4
TMDS171, TMDS171I
SLLSEN7A – OCTOBER 2015 – REVISED DECEMBER 2015
V_OD No Term
V_OD 150 to 300 :
4.5 5 5.5 6 6.5 7 7.5 8
V_sadj (k:)
D003
8.3.10 TMDS Outputs
A 1% precision resistor, 7.06 kΩ, connected from VSADJ to ground is recommended to allow the differential
output swing to comply with TMDS signal levels. The differential output driver provides a typical 10 mA current
sink capability, which provides a typical 500 mV voltage drop across a 50 Ω termination resistor.
Vcc
AVCC
TMDS171
Zo=RT
TMDS DRIVER
Zo=RT
TMDS RECEIVER
Figure 27. TMDS Driver and Termination Circuit
In Figure 27, if V_CC (TMDS171 supply) and AVCC (sink termination supply) are both powered, the TMDS output
signals are high impedance when OE = high. Both supplies being active are the normal operating condition.
Again refer to Figure 27, if V_CC is on and AVCC is off, the TMDS outputs source a typical 5 mA current through
each termination resistor to ground. A total of 33 mW of power is consumed by the terminations independent of
the OEB logical selection. When AVCC is powered on, normal operation (OE controls output impedance) is
resumed. When the power source of the device is off and the power source to termination is on, the IO(off),
output leakage current, specification ensures the leakage current is limited to 45 μA or less. The PRE_SEL pin
provides – 2 dB de-emphasis gain, allowing output signal pre-conditioning to offset interconnect losses from the
TMDS171 outputs to a TMDS receiver. De-emphasis is recommended to be set at 0 dB while connecting to a
receiver through short PCB route. The V_OD of the data lanes and clock lane can be adjusted through I²C. See
Table 11 for detail. Figure 1 shows the different output voltages based on the different VSADJ settings.
8.3.11 Pre-Emphasis/De-Emphasis
The TMDS171 provides de-emphasis as a way to compensate for ISI loss between the TMDS171 outputs and a
TMDS receiver. There are two methods to implement this function. When in pin strapping mode the PRE_SEL
pin controls this function. The PRE_SEL pin provides - 2 dB or 0 dB de-emphasis, which allows the output signal
pre-conditioning. De-emphasis is recommended to be set at 0-dB while connecting to a receiver through short
PCB traces. When pulled to ground through a 65 kΩ resistor - 2 dB can be realized, see Figure 9. When using
I²C, reg0Ch[1:0] is used to make these adjustments.
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