CC2430 Datasheet, PDF (46/234 Pages) Texas Instruments – A True System-on-Chip solution for 2.4 GHz IEEE 802.15.4 / ZigBee-TM

CC2430
Register name
U0DBUF
U0BAUD
U0UCR
U0GCR
U1CSR
U1DBUF
U1BAUD
U1UCR
U1GCR
WDCTL
SFR
Module
Address
0xC1
USART0
0xC2
USART0
0xC4
USART0
0xC5
USART0
0xF8
USART1
0xF9
USART1
0xFA
USART1
0xFB
USART1
0xFC
USART1
0xC9
WDT
Description
USART 0 Receive/Transmit Data Buffer
USART 0 Baud Rate Control
USART 0 UART Control
USART 0 Generic Control
USART 1 Control and Status
USART 1 Receive/Transmit Data Buffer
USART 1 Baud Rate Control
USART 1 UART Control
USART 1 Generic Control
Watchdog Timer Control
12.5 CPU Registers
This section describes the internal registers
found in the CPU.
12.5.1 Registers R0-R7
The CC2430 provides four register banks of
eight registers each. These register banks are
mapped in the DATA memory space at
addresses 0x00-0x07, 0x08-0x0F, 0x10-0x17
and 0x18-0x1F. Each register bank contains
the eight 8-bit register R0-R7. The register
bank to be used is selected through the
Program Status Word PSW.RS[1:0].
12.5.2 Program Status Word
The Program Status Word (PSW) contains
several bits that show the current state of the
CPU. The Program Status Word is accessible
as an SFR and it is bit-addressable. PSW is
shown below and contains the Carry flag,
Auxiliary Carry flag for BCD operations,
Register Select bits, Overflow flag and Parity
flag. Two bits in PSW are uncommitted and can
be used as user-defined status flags
.
CC2430 PRELIMINARY Data Sheet (rev. 1.03) SWRS036A
Page 46 of 232