CC2430 Datasheet, PDF (141/234 Pages) Texas Instruments – A True System-on-Chip solution for 2.4 GHz IEEE 802.15.4 / ZigBee-TM

CC2430
PCON.IDLE bit after setting the MODE bits,
enters the selected sleep mode.
An enabled interrupt from port pins or
sleep timer or a power-on reset will wake
the device from other power modes and
bring it into PM0 by resetting the MODE
bits.
13.10.3 System clock
The system clock is derived from the
selected system clock source, which is the
high-speed (32 MHz) crystal oscillator or
the high-speed RC oscillator. The
CLKCON.OSC bit selects the source of the
system clock. Note that to use the RF
transceiver the high speed crystal
oscillator must be selected and stable.
Note that each time the CLKCON.OSC bit is
altered, then the CLKCON.CLKSPD bit
must also be altered in order for the
system to know the frequency of the
system clock.
When the SLEEP.XOSC_STB is 1, the 32
MHz crystal oscillator is stable and can be
used as the source for the system clock.
The oscillator not selected as the system
clock source, will be set in power-down
mode by setting SLEEP.OSC_PD to 1.
Thus the high-speed RC oscillator may be
turned off when the 32 MHz crystal
oscillator has been selected as system
clock source and vice versa. When
SLEEP.OSC_PD is 0, both oscillators are
powered up and running.
13.10.4 High-speed oscillators
Two high speed oscillators are present in
the device. The high-speed crystal
oscillator startup time may be too long for
some applications, therefore the device
can run on the high-speed RC oscillator
until crystal oscillator is stable. The high-
speed RC oscillator consumes less power
than the crystal oscillator, but since it is
not as accurate as the crystal oscillator it
can not be used for RF transceiver
operation.
13.10.5 32.768 kHz oscillators
Two 32.768 kHz oscillators are present in
the device. By default the low power RC
oscillator is enabled. The RC oscillator
consumes less power, but is less accurate
than the 32.768 kHz crystal oscillator.
Refer to Table 9 and Table 10 on page 16
for characteristics of these oscillators. The
32.768 kHz oscillators are used to drive
the 32.768 kHz clock to the Sleep Timer
and Watchdog Timer. The selection of
which oscillator source for the 32.768 kHz
clock is performed with the
CLKCON.OSC32K register bit.
The CLKCON.OSC32K register bit must
only be changed while using the high-
speed RC oscillator as the system clock
source. When the high speed crystal
oscillator is running the 32.768 kHz RC
oscillator is continuously calibrated, and
switching 32.768 kHz oscillator is not
supported in this case.
13.10.6 Timer Tick generation
The power management controller
generates a tick or enable signal for the
peripheral timers, thus acting as a
prescaler for the timers. This is a global
clock division for Timer 1, Timer 3 and
Timer 4. The tick speed is programmed
from 0.25 to 32 MHz in the
CLKCON.TICKSPD register.
13.10.7 Data Retention
In power modes PM2 and PM3 parts of
SRAM will retain its contents. The content
of internal registers is also retained in
PM2/3.
The XDATA memory locations 0xF000-
0xFFFF (4096 bytes) retains data in
PM2/3. Please note one exception as
given below.
The XDATA memory locations 0xE000-
0xEFFF (4096 bytes) and the area
0xFD58-0xFEFF (424 bytes) will lose all
data when PM2/3 is entered. These
locations will contain undefined data when
PM0 is re-entered.
The registers which retain their contents
are the CPU registers, peripheral registers
and RF registers therefore switching to the
low-power modes PM2/3 appears
transparent to software. The RF
TXFIFO/RXFIFO contents is not retained
when entering PM2/3.
CC2430 PRELIMINARY Data Sheet (rev. 1.03) SWRS036A
Page 141 of 232