CC2430 Datasheet, PDF (4/234 Pages) Texas Instruments – A True System-on-Chip solution for 2.4 GHz IEEE 802.15.4 / ZigBee-TM

CC2430
12.7
12.8
12.9
12.10
12.11
12.12
INTERRUPTS ........................................................................................................................... 52
OSCILLATORS AND CLOCKS .................................................................................................... 62
DEBUG INTERFACE ................................................................................................................. 62
RAM...................................................................................................................................... 66
FLASH MEMORY..................................................................................................................... 66
MEMORY ARBITER ................................................................................................................. 66
13 PERIPHERALS........................................................................................................................ 69
13.1
13.2
13.3
13.4
13.5
13.6
13.7
13.8
13.9
13.10
13.11
13.12
13.13
13.14
I/O PORTS ............................................................................................................................... 69
DMA CONTROLLER ............................................................................................................... 86
16-BIT TIMER, TIMER1 ........................................................................................................... 98
MAC TIMER (TIMER 2) ........................................................................................................ 110
SLEEP TIMER ........................................................................................................................ 117
8-BIT TIMER 3 AND TIMER 4 ................................................................................................. 118
ADC..................................................................................................................................... 127
RANDOM NUMBER GENERATOR........................................................................................... 133
AES COPROCESSOR.............................................................................................................. 135
POWER MANAGEMENT ......................................................................................................... 140
POWER ON RESET AND BROWN OUT DETECTOR.................................................................. 144
WATCHDOG TIMER............................................................................................................... 145
USART ................................................................................................................................ 147
FLASH CONTROLLER ............................................................................................................ 157
14 RADIO..................................................................................................................................... 164
14.1
14.2
14.3
14.4
14.5
14.6
14.7
14.8
14.9
14.10
14.11
14.12
14.13
14.14
14.15
14.16
14.17
14.18
14.19
14.20
14.21
14.22
14.23
14.24
14.25
14.26
14.27
14.28
14.29
14.30
14.31
14.32
14.33
14.34
IEEE 802.15.4 MODULATION FORMAT ................................................................................ 165
COMMAND STROBES............................................................................................................. 166
RF REGISTERS...................................................................................................................... 166
INTERRUPTS ......................................................................................................................... 166
FIFO ACCESS........................................................................................................................ 169
DMA.................................................................................................................................... 170
RECEIVE MODE ..................................................................................................................... 170
RXFIFO OVERFLOW ............................................................................................................ 170
TRANSMIT MODE .................................................................................................................. 171
GENERAL CONTROL AND STATUS ......................................................................................... 172
DEMODULATOR, SYMBOL SYNCHRONIZER AND DATA DECISION......................................... 172
FRAME FORMAT ................................................................................................................... 173
SYNCHRONIZATION HEADER................................................................................................. 173
LENGTH FIELD ...................................................................................................................... 174
MAC PROTOCOL DATA UNIT ................................................................................................ 175
FRAME CHECK SEQUENCE..................................................................................................... 175
RF DATA BUFFERING ........................................................................................................... 176
ADDRESS RECOGNITION ....................................................................................................... 177
ACKNOWLEDGE FRAMES...................................................................................................... 178
RADIO CONTROL STATE MACHINE ........................................................................................ 179
MAC SECURITY OPERATIONS (ENCRYPTION AND AUTHENTICATION) ................................. 181
LINEAR IF AND AGC SETTINGS ........................................................................................... 181
RSSI / ENERGY DETECTION ................................................................................................. 181
LINK QUALITY INDICATION.................................................................................................. 182
CLEAR CHANNEL ASSESSMENT............................................................................................ 182
FREQUENCY AND CHANNEL PROGRAMMING ........................................................................ 183
VCO AND PLL SELF-CALIBRATION ..................................................................................... 183
OUTPUT POWER PROGRAMMING .......................................................................................... 183
INPUT / OUTPUT MATCHING ................................................................................................. 184
TRANSMITTER TEST MODES................................................................................................. 184
SYSTEM CONSIDERATIONS AND GUIDELINES ....................................................................... 186
PCB LAYOUT RECOMMENDATION ....................................................................................... 188
ANTENNA CONSIDERATIONS ................................................................................................ 189
CSMA/CA STROBE PROCESSOR .......................................................................................... 189
CC2430 PRELIMINARY Data Sheet (rev. 1.03) SWRS036A
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