CC2430 Datasheet, PDF (217/234 Pages) Texas Instruments – A True System-on-Chip solution for 2.4 GHz IEEE 802.15.4 / ZigBee-TM

CC2430
Bit Name
7
-
6:4 DAC_SRC[2:0]
Reset
0
000
R/W
R0
R/W
Description
Reserved, read as 0.
The TX DACs data source is selected by DAC_SRC
according to:
000 : Normal operation (from modulator).
001 : The DAC_I_O and DAC_Q_O override values below.-
010 : From ADC, most significant bits
011 : I/Q after digital down mix and channel filtering.
100 : Full-spectrum White Noise (from CRC)
101 : From ADC, least significant bits
110 : RSSI / Cordic Magnitude Output
111 : HSSD module.
3:0 DAC_I_O[5:2]
000
R/W
This feature will often require the DACs to be manually
turned on in MANOVR and
PAMTST.ATESTMOD_MODE=4.
I-branch DAC override value.
Table 79: Register DACTSTH (0xDF3C)
Bit Name
Reset R/W Description
7:6 DAC_I_O[1:0]
5:0 DAC_Q_O[5:0]
00
0x00
R/W I-branch DAC override value.
R/W Q-branch DAC override value.
Table 80: Register DACTSTL (0xDF3D)
Bit Name
Reset R/W Description
7:0 IEEE_ADDR0[7:0]
0x00
R/W IEEE ADDR byte 0
Table 81: Register IEEE_ADDR0 (0xDF43)
Bit Name
Reset R/W Description
7:0 IEEE_ADDR1[7:0]
0x00
R/W IEEE ADDR byte 1
Table 82: Register IEEE_ADDR1 (0xDF44)
Bit Name
Reset R/W Description
7:0 IEEE_ADDR2[7:0]
0x00
R/W IEEE ADDR byte 2
Table 83: Register IEEE_ADDR2 (0xDF45)
CC2430 PRELIMINARY Data Sheet (rev. 1.03) SWRS036A
Page 217 of 232