CC2430 Datasheet, PDF (63/212 Pages) Texas Instruments – A True System-on-Chip solution for 2.4 GHz IEEE 802.15.4 / ZigBee-TM

CC2430
Debug Interface : Debug Lock Bit
Table 36: Debug Configuration
Bit
Name
Description
7-4
-
Not used, must be set to zero.
3
TIMERS_OFF
2
DMA_PAUSE
1
TIMER_SUSPEND
0
SEL_FLASH_INFO_PAGE
Disable timers. Disable timer operation. This overrides the
TIMER_SUSPEND bit and its function.
0 Do not disable timers
1 Disable timers
DMA pause
0 Enable DMA transfers
1 Pause all DMA transfers
Suspend timers. Timer operation is suspended for debug
instructions and if a step instruction is a branch. If not
suspended these instructions would result an extra timer
count during the clock cycle in which the branch is executed
0 Do not suspend timers
1 Suspend timers
Select flash information page (2KB lowest part of flash)
0 Select flash main page (32, 64, or 128 KB)
1 Select flash information page (2KB)
Table 37: Debug Status
Bit
Name
7
CHIP_ERASE_DONE
6
PCON_IDLE
5
CPU_HALTED
4
POWER_MODE_0
3
HALT_STATUS
2
DEBUG_LOCKED
1
OSCILLATOR_STABLE
0
STACK_OVERFLOW
Description
Flash chip erase done
0 Chip erase in progress
1 Chip erase done
PCON idle
0 CPU is running
1 CPU is idle (clock gated)
CPU halted
0 CPU running
1 CPU halted
Power Mode 0
0 Power Mode 1-3 selected
1 Power Mode 0 selected
Halt status. Returns cause of last CPU halt
0 CPU was halted by HALT debug command
1 CPU was halted by hardware breakpoint
Debug locked. Returns value of DBGLOCK bit
0 Debug interface is not locked
1 Debug interface is locked
Oscillators stable. This bit represents the status of the
SLEEP.XSOC_STB and SLEEP.HFRC_STB register bits.
0 Oscillators not stable
1 Oscillators stable
Stack overflow. This bit indicates when the CPU writes to
DATA memory space at address 0xFF which is possibly a
stack overflow
0 No stack overflow
1 Stack overflow
12.4.3 Hardware Breakpoints
The debug command SET_HW_BRKPNT is
used to set a hardware breakpoint. The
CC2430 supports up to four hardware
breakpoints. When a hardware breakpoint is
enabled it will compare the CPU address bus
with the breakpoint. When a match occurs, the
CPU is halted.
When issuing the SET_HW_BRKPNT, the
external host must supply three data bytes that
define the hardware breakpoint. The hardware
breakpoint itself consists of 18 bits while three
bits are used for control purposes. The format
of the three data bytes for the
SET_HW_BRKPNT command is as follows.
CC2430 Data Sheet (rev. 2.1) SWRS036F
Page 63 of 211