CC2430 Datasheet, PDF (149/212 Pages) Texas Instruments – A True System-on-Chip solution for 2.4 GHz IEEE 802.15.4 / ZigBee-TM

CC2430
Peripherals : USART
U0GCR (0xC5) – USART 0 Generic Control
Bit Name
7 _CPOL
6 _CPHA
Reset R/W
0
R/W
0
R/W
5 _ORDER
0
R/W
4:0 _{BAUD_E[4:0]} 0x00 R/W
Description
SPI clock polarity
0 Negative clock polarity
1 Positive clock polarity
SPI clock phase
0 Data is output on MOSI when SCK goes from CPOL inverted
to CPOL, and data input is sampled on MISO when SCK goes
from CPOL to CPOL inverted.
1 Data is output on MOSI when SCK goes from CPOL to CPOL
inverted, and data input is sampled on MISO when SCK goes
from CPOL inverted to CPOL.
Bit order for transfers
0 LSB first
1 MSB first
Baud rate exponent value. BAUD_E along with BAUD_M decides
the UART baud rate and the SPI master SCK clock frequency
U0DBUF (0xC1) – USART 0 Receive/Transmit Data Buffer
Bit Name
7:0 _DATA[7:0]
Reset R/W
0x00 R/W
Description
USART receive and transmit data. When writing this register the
data written is written to the internal, transmit data register. When
reading this register, the data from the internal read data register is
read.
U0BAUD (0xC2) – USART 0 Baud Rate Control
Bit Name
Reset R/W
7:0 _{BAUD_M[7:0]} 0x00 R/W
Description
Baud rate mantissa value. BAUD_E along with BAUD_M decides
the UART baud rate and the SPI master SCK clock frequency
CC2430 Data Sheet (rev. 2.1) SWRS036F
Page 149 of 211