CC2430 Datasheet, PDF (176/212 Pages) Texas Instruments – A True System-on-Chip solution for 2.4 GHz IEEE 802.15.4 / ZigBee-TM

CC2430
Radio : CSMA/CA Strobe Processor
The antenna should be connected as close as
possible to the IC. If the antenna is located
away from the RF pins the antenna should be
matched to the feeding transmission line
(50Ω).
14.34 CSMA/CA Strobe Processor
The Command Strobe/CSMA-CA Processor
(CSP) provides the control interface between
the CPU and the Radio module in the CC2430.
Strobe instruction is also used only to control
the CSP. The Immediate Command Strobe
instructions are described in section 14.34.7.
The CSP interfaces with the CPU through the
SFR register RFST and the RF registers CSPX,
CSPY, CSPZ, CSPT and CSPCTRL. The CSP
produces interrupt requests to the CPU. In
addition the CSP interfaces with the MAC
Timer by observing MAC Timer overflow
events.
The CSP allows the CPU to issue command
strobes to the radio thus controlling the
operation of the radio.
The CSP has two modes of operation as
follows, which are described below.
• Immediate Command Strobe execution.
• Program execution
Immediate Command Strobes are written as
an Immediate Command Strobe instruction to
the CSP which are issued instantly to the
Radio module. The Immediate Command
Program execution mode means that the CSP
executes a sequence of instructions, from a
program memory or instruction memory, thus
constituting a short user-defined program. The
available instructions are from a set of 14
instructions. The instruction set is defined in
section 14.34.8. The required program is first
loaded into the CSP by the CPU, and then the
CPU instructs the CSP to start executing the
program.
The program execution mode together with the
MAC Timer allows the CSP to automate
CSMA-CA algorithms and thus act as a co-
processor for the CPU.
The operation of the CSP is described in detail
in the following sections. The command
strobes and other instructions supported by
the CSP are given in section 14.34.8 on page
179.
RFST (0xE1) – RF CSMA-CA/Strobe Processor
Bit Name
Reset R/W
Description
7:0 INSTR[7:0] 0xC0 R/W
Data written to this register will be written to the CSP
instruction memory. Reading this register will return the
CSP instruction currently being executed.
14.34.1 Instruction Memory
The CSP executes single byte program
instructions which are read from a 24 byte
instruction memory. The instruction memory is
written to sequentially through the SFR
register RFST. An instruction write pointer is
maintained within the CSP to hold the location
within the instruction memory where the next
instruction written to RFST will be stored.
Following a reset the write pointer is reset to
location 0. During each RFST register write,
the write pointer will be incremented by 1 until
the end of memory is reached when the write
pointer will stop incrementing, thus writing
more than 24 bytes only the last byte written
will be stored in the last position. The first
instruction written to RFST will be stored in
location 0, the location where program
execution starts. Thus a complete CSP
program may contain a maximum of 24 bytes
that is written to the instruction memory by
writing each instruction in the desired order to
the RFST register. Note that the program
memory does not need to be filled, thus a CSP
program may contain less than 24 bytes.
The write pointer may be reset to 0 by writing
the immediate command strobe instruction
ISSTOP. In addition the write pointer will be
reset to 0 when the command strobe SSTOP
is executed in a program.
Following a reset, the instruction memory is
filled with SNOP (No Operation) instructions
(opcode value 0xC0).
While the CSP is executing a program, there
shall be no attempts to write instructions to the
instruction memory by writing to RFST. Failure
to observe this rule can lead to incorrect
program execution and corrupt instruction
memory contents. However, Immediate
Command Strobe instructions may be written
to RFST (see section 14.34.3).
CC2430 Data Sheet (rev. 2.1) SWRS036F
Page 176 of 211