C8051F300_08 Datasheet, PDF (71/179 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F300/1/2/3/4/5
SFR Definition 8.5. ACC: Accumulator
R/W
ACC.7
Bit7
R/W
ACC.6
Bit6
R/W
ACC.5
Bit5
R/W
ACC.4
Bit4
R/W
ACC.3
Bit3
R/W
ACC.2
Bit2
R/W
R/W
Reset Value
ACC.1 ACC.0 00000000
Bit1
Bit0 SFR Address:
(bit addressable) 0xE0
Bits7–0: ACC: Accumulator.
This register is the accumulator for arithmetic operations.
SFR Definition 8.6. B: B Register
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset Value
B.7
B.6
B.5
B.4
B.3
B.2
B.1
B.0 00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0 SFR Address:
(bit addressable) 0xF0
Bits7–0: B: B Register.
This register serves as a second accumulator for certain arithmetic operations.
Rev. 2.9
71