C8051F300_08 Datasheet, PDF (66/179 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F300/1/2/3/4/5
Table 8.2. Special Function Register (SFR) Memory Map
F8 CPT0CN
PCA0L PCA0H PCA0CPL0 PCA0CPH0
F0
B
P0MDIN
E8 ADC0CN PCA0CPL1 PCA0CPH1 PCA0CPL2 PCA0CPH2
E0
ACC
XBR0
XBR1
XBR2
IT01CF
D8 PCA0CN PCA0MD PCA0CPM0 PCA0CPM1 PCA0CPM2
D0
PSW
REF0CN
C8 TMR2CN
TMR2RLL TMR2RLH TMR2L TMR2H
C0 SMB0CN SMB0CF SMB0DAT
ADC0GT
B8
IP
AMX0SL ADC0CF
B0
OSCXCN OSCICN OSCICL
A8
IE
A0
P0MDOUT
98 SCON0
SBUF0
CPT0MD
90
88
TCON
TMOD
TL0
TL1
TH0
TH1
80
P0
SP
DPL
DPH
0(8)
1(9)
2(A)
3(B)
4(C)
5(D)
(bit addressable)
EIP1
EIE1
ADC0LT
ADC0
FLSCL
CKCON
6(E)
RSTSRC
FLKEY
CPT0MX
PSCTL
PCON
7(F)
Register
Table 8.3. Special Function Registers*
Address
Description
ACC
0xE0
Accumulator
ADC0CF
ADC0CN
0xBC
0xE8
ADC0 Configuration
ADC0 Control
ADC0GT
ADC0LT
ADC0
0xC4
0xC6
0xBE
ADC0 Greater-Than Compare Word
ADC0 Less-Than Compare Word
ADC0 Data Word
AMX0SL
B
CKCON
0xBB
0xF0
0x8E
ADC0 Multiplexer Channel Select
B Register
Clock Control
CPT0CN
CPT0MD
CPT0MX
0xF8
0x9D
0x9F
Comparator0 Control
Comparator0 Mode Selection
Comparator0 MUX Selection
DPH
DPL
EIE1
0x83
0x82
0xE6
Data Pointer High
Data Pointer Low
Extended Interrupt Enable 1
EIP1
FLKEY
0xF6
0xB7
External Interrupt Priority 1
Flash Lock and Key
*Note: SFRs are listed in alphabetical order. All undefined SFR locations are reserved
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Rev. 2.9