C8051F300_08 Datasheet, PDF (41/179 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F300/1/2/3/4/5
5.3.3. Settling Time Requirements
When the ADC0 input configuration is changed (i.e., a different AMUX0 or PGA selection is made), a mini-
mum tracking time is required before an accurate conversion can be performed. This tracking time is deter-
mined by the AMUX0 resistance, the ADC0 sampling capacitance, any external source resistance, and the
accuracy required for the conversion. Note that in low-power tracking mode, three SAR clocks are used for
tracking at the start of every conversion. For most applications, these three SAR clocks will meet the mini-
mum tracking time requirements.
Figure 5.5 shows the equivalent ADC0 input circuits for both Differential and Single-ended modes. Notice
that the equivalent time constant for both input circuits is the same. The required ADC0 settling time for a
given settling accuracy (SA) may be approximated by Equation 5.1. When measuring the Temperature
Sensor output or V_DD with respect to GND, R_TOTAL reduces to R_MUX. See Table 5.1 for ADC0 minimum
settling time (track/hold time) requirements.
t
=
ln


S^-2---A^{n--}

R_TOTALC_SAMPLE
Equation 5.1. ADC0 Settling Time Requirements
Where:
SA is the settling accuracy, given as a fraction of an LSB (for example, 0.25 to settle within 1/4 LSB)
t is the required settling time in seconds
R_TOTAL is the sum of the AMUX0 resistance and any external source resistance.
n is the ADC resolution in bits (8).
Differential Mode
MUX Select
Single-Ended Mode
MUX Select
P0.x
R_MUX = 5k
RC_Input= R_MUX * C_SAMPLE
P0.y
R_MUX = 5k
MUX Select
C_SAMPLE = 5pF
C_SAMPLE = 5pF
P0.x
R_MUX = 5k
RC_Input= R_MUX * C_SAMPLE
Note: When the PGA gain is set to 0.5, C_SAMPLE = 3pF
C_SAMPLE = 5pF
Figure 5.5. ADC0 Equivalent Input Circuits
Rev. 2.9
41