C8051F300_08 Datasheet, PDF (17/179 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F300/1/2/3/4/5
1.1.3. Additional Features
The C8051F300/1/2/3/4/5 SoC family includes several key enhancements to the CIP-51 core and periph-
erals to improve performance and ease of use in end applications.
The extended interrupt handler provides 12 interrupt sources into the CIP-51 (as opposed to 7 for the stan-
dard 8051), allowing numerous analog and digital peripherals to interrupt the controller. An interrupt driven
system requires less intervention by the MCU, giving it more effective throughput. The extra interrupt
sources are very useful when building multitasking, real-time systems.
Eight reset sources are available: power-on reset circuitry (POR), an on-chip V_DD monitor (forces reset
when power supply voltage drops below 2.7 V), a Watchdog Timer, a Missing Clock Detector, a voltage
level detection from Comparator0, a forced software reset, an external reset pin, and an illegal Flash
read/write protection circuit. Each reset source except for the POR, Reset Input Pin, or Flash protection
may be disabled by the user in software. The WDT may be permanently enabled in software after a power-
on reset during MCU initialization.
The internal oscillator is available as a factory calibrated 24.5 MHz ±2% (C8051F300/1 devices); an uncal-
ibrated version is available on C8051F302/3/4/5 devices. On all C8051F300/1/2/3/4/5 devices, the internal
oscillator period may be user programmed in ~0.5% increments. An external oscillator drive circuit is also
included, allowing an external crystal, ceramic resonator, capacitor, RC, or CMOS clock source to generate
the system clock. If desired, the system clock source may be switched on-the-fly to the external oscillator
circuit. An external oscillator can be extremely useful in low power applications, allowing the MCU to run
from a slow (power saving) external crystal source, while periodically switching to the fast (up to 25 MHz)
internal oscillator as needed.
XTAL1
XTAL2
VDD
P0.x
P0.y
Comparator 0
+
-
C0RSEF
Supply
Monitor
+
-
Enable
Power On
Reset
'0'
(wired-OR)
Internal
Oscillator
External
Oscillator
Drive
Missing
Clock
Detector
(one-
shot)
EN
PCA
WDT
EN
(Software Reset)
SWRSF
Reset
Funnel
Illegal
FLASH
Operation
System
Clock
Clock Select
CIP-51
Microcontroller ^{System Reset}
Core
Extended Interrupt
Handler
Figure 1.4. On-Chip Clock and Reset
/RST
Rev. 2.9
17