C8051F300_08 Datasheet, PDF (169/179 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F300/1/2/3/4/5
SFR Definition 16.3. PCA0CPMn: PCA Capture/Compare Mode
R/W
R/W
PWM16n ECOMn
Bit7
Bit6
R/W
CAPPn
Bit5
R/W
CAPNn
Bit4
R/W
MATn
Bit3
R/W
TOGn
Bit2
R/W
PWMn
Bit1
R/W
ECCFn
Bit0
Reset Value
00000000
SFR Address:
0xDA, 0xDB, 0xDC
PCA0CPMn Address:
PCA0CPM0 = 0xDA (n = 0)
PCA0CPM1 = 0xDB (n = 1)
PCA0CPM2 = 0xDC (n = 2)
Bit7:
Bit6:
Bit5:
Bit4:
Bit3:
Bit2:
Bit1:
Bit0:
PWM16n: 16-bit Pulse Width Modulation Enable.
This bit selects 16-bit mode when Pulse Width Modulation mode is enabled (PWMn = 1).
0: 8-bit PWM selected.
1: 16-bit PWM selected.
ECOMn: Comparator Function Enable.
This bit enables/disables the comparator function for PCA Module n.
0: Disabled.
1: Enabled.
CAPPn: Capture Positive Function Enable.
This bit enables/disables the positive edge capture for PCA Module n.
0: Disabled.
1: Enabled.
CAPNn: Capture Negative Function Enable.
This bit enables/disables the negative edge capture for PCA Module n.
0: Disabled.
1: Enabled.
MATn: Match Function Enable.
This bit enables/disables the match function for PCA Module n. When enabled, matches of the
PCA counter with a module's capture/compare register cause the CCFn bit in PCA0MD register
to be set to logic 1.
0: Disabled.
1: Enabled.
TOGn: Toggle Function Enable.
This bit enables/disables the toggle function for PCA Module n. When enabled, matches of the
PCA counter with a module's capture/compare register cause the logic level on the CEXn pin to
toggle. If the PWMn bit is also set to logic 1, the module operates in Frequency Output Mode.
0: Disabled.
1: Enabled.
PWMn: Pulse Width Modulation Mode Enable.
This bit enables/disables the PWM function for PCA Module n. When enabled, a pulse width
modulated signal is output on the CEXn pin. 8-bit PWM is used if PWM16n is cleared; 16-bit
mode is used if PWM16n is set to logic 1. If the TOGn bit is also set, the module operates in Fre-
quency Output Mode.
0: Disabled.
1: Enabled.
ECCFn: Capture/Compare Flag Interrupt Enable.
This bit sets the masking of the Capture/Compare Flag (CCFn) interrupt.
0: Disable CCFn interrupts.
1: Enable a Capture/Compare Flag interrupt request when CCFn is set.
Rev. 2.9
169