C8051F50X_11 Datasheet, PDF (70/313 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F50x/F51x
6.5. ADC0 Analog Multiplexer
ADC0 includes an analog multiplexer to enable multiple analog input sources. Any of the following may be
selected as an input: P0.0–P3.7, the on-chip temperature sensor, the core power supply (V_DD), or ground
(GND). ADC0 is single-ended and all signals measured are with respect to GND. The ADC0 input
channels are selected using the ADC0MX register as described in SFR Definition 6.13.
ADC0MX
P0.0
P0.7
P1.0
P1.7
P2.0
AMUX
P2.7
ADC0
Temp
Sensor
P3.0
P3.7
VDD
GND
*P3.1-P3.7 Only available as
inputs on 48-pin and 40-pin
packages
Figure 6.8. ADC0 Multiplexer Block Diagram
Important Note About ADC0 Input Configuration: Port pins selected as ADC0 inputs should be config-
ured as analog inputs, and should be skipped by the Digital Crossbar. To configure a Port pin for analog
input, set to 0 the corresponding bit in register PnMDIN. To force the Crossbar to skip a Port pin, set to 1
the corresponding bit in register PnSKIP. See Section “20. Port Input/Output” on page 177 for more Port
I/O configuration details.
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Rev. 1.2