C8051F50X_11 Datasheet, PDF (277/313 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F50x/F51x
T2XCLK
CKCON
TTTTTTSS
3 3 2 2 1 0CC
MMMMMMA A
HLHL 10
SYSCLK / 12
0
External Clock / 8
1
SYSCLK
0
TR2
1
TCLK _{TMR2L TMR2H}
Capture
External Clock / 8
TF2CEN
TMR2RLL TMR2RLH
TF2H
TF2L
TF2LEN
TF2CEN
T2SPLIT
TR2
T2XCLK
Figure 26.6. Timer 2 External Oscillator Capture Mode Block Diagram
Interrupt
Rev. 1.2
277